Texas Instruments TMS320C28x, Reference Manual, Page: 662 / 695

G-3 Glossary
auxiliary register: One of eight registers used as a pointer to a memory
location. The register is operated on by the auxiliary register arithmetic
unit (ARAU) and is selected by the auxiliary register pointer (ARP). See
also
AR0 − AR5 , AR6/AR7 , and XAR6/XAR7 .
auxiliary-register indirect addressing mode: The indirect addressing
mode that allows you to use the name of an auxiliary register in an oper-
and that uses that register as a pointer. See also
ARP indirect addressing
mode .
auxiliary register pointer (ARP): A 3-bit field in status register ST1 that se-
lects the current auxiliary register. When an instruction uses ARP indirect
addressing mode, that instruction uses the current auxiliary register to
point to data space. When an instruction specifies auxiliary register
n by
using auxiliary-register indirect addressing mode, the ARP is updated,
so that it points to auxiliary register
n . See also current auxiliary register .
B
background code: The body of code that can be halted during debugging
because it is not time-critical.
barrel shifter: Hardware in the CPU that performs all left and right shifts of
register or data-space values.
bit field: One or more register bits that are differentiated from other bits in
the same register by a specific name and function.
bit manipulation: The testing or modifying of individual bits in a register or
data-space location.
boundary scan: The use of scan registers on the border of a chip or section
of logic to capture the pin states. By scanning these registers, all pin
states can be transmitted through the JTAG port for analysis.
branch: 1) A forcing of program control to a new address. 2) An instruction
that forces program control to a new address but neither saves a return
address (like a call) nor restores a return address (like a return).
break event: A debug event that causes the CPU to enter the debug-halt
state.
breakpoint: A place in a routine specified by a breakpoint instruction or
hardware breakpoint, where the execution of the routine is to be halted
and the debug-halt state entered.
Glossary