Texas Instruments TMS320C28x, Reference Manual, Page: 35 / 695

CPU Registers
2-5 Central Processing Unit
Table 2 − 1. CPU Register Summary (Continued)
Register Size Description Value After Reset
DP 16 bits Data-page pointer 0x0000
IFR 16 bits Interrupt flag register 0x0000
IER 16 bits Interrupt enable register 0x0000 (INT1 to INT14, DLOGINT,
RTOSINT disabled)
DBGIER 16 bits Debug interrupt enable
register 0x0000 (INT1 to INT14, DLOGINT,
RTOSINT disabled)
P 32 bits Product register 0x00000000
PH 16 bits High half of P 0x0000
PL 16 bits Low half of P 0x0000
PC 22 bits Program counter 0x3F FFC0
RPC 22 bits Return program counter 0x00000000
SP 16 bits Stack pointer 0x0400
ST0 16 bits Status register 0 0x0000
ST1 16 bits Status register 1 0x080B †
XT 32 bits Multiplicand register 0x00000000
T 16 bits High half of XT 0x0000
TL 16 bits Low half of XT 0x0000
†
Reset value shown is for devices without the VMAP signal and MOM1MAP signal pinned out. On these
devices both of these signals are tied high internal to the device.