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POP XARn
6-280
POP XARn
Pop Top of Stack to 32-bit Auxiliary Register
SYNTAX OPTIONS
OPCODE
OBJMODE
RPT
CYC
POP XAR0
0011 1010 1011 1110
1
−
1
POP XAR1
1011 0010 1011 1110
1
−
1
POP XAR2
1010 1010 1011 1110
1
−
1
POP XAR3
1010 0010 1011 1110
1
−
1
POP XAR4
1010 1000 1011 1110
1
−
1
POP XAR5
1010 0000 1011 1110
1
−
1
POP XAR6
1100 0010 1011 1110
X
−
1
POP XAR7
1100 0011 1011 1110
X
−
1
Operands
XARn
XAR0 to XAR7, 32-bit auxiliary registers
Description
Predecrement SP by 2. Load XARn with the 32-bit value pointed to by SP:
SP −= 2;
XARn = [SP];
Flags and
Modes
None
Repeat
This instruction is not repeatable. If this instruction follows the RPT
instruction, it resets the repeat counter (RPTC) and executes only once.
Example
.
.
.
; Full context restore for an
; interrupt or trap function
POP XT
POP XAR7
POP XAR6
POP XAR5
POP XAR4
POP XAR3
POP XAR2
POP AR1H:AR0H
IRET
; 32-bit XT restore
; 32-bit XAR7 restore
; 32-bit XAR6 restore
; 32-bit XAR5 restore
; 32-bit XAR4 restore
; 32-bit XAR3 restore
; 32-bit XAR2 restore
; 16-bit AR1H and 16-bit AR0H restore
Summary of Contents for TMS320C28x
Page 30: ...1 12...
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Page 269: ...IN loc16 PA 6 112 MOV AL 0 AL 0 UOUT IORegC AL IOspace IORegC AL 10...
Page 308: ...MAXCUL P loc32 6 151 Saturate MOVL Var64 2 ACC Store result into Var64 MOVL Var64 P...
Page 509: ...SUBL ACC P PM 6 352 SUBL ACC P PM ACC S B 11 M X 4 MOVH Y ACC 5 Store Q15 result into Y...
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