Notational Conventions
v
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value from 0 to 5; where the
6bit
appears, you type a 6-bit constant. The
rest of the instruction, including the square brackets, must be entered as
shown.
-
When braces or brackets enclose an operand, as in {operand}, the oper-
and is optional. If you use an optional operand, you specify the information
within the braces; you do not enter the braces themselves. In the following
syntax, the operand <<
shift
is optional:
MOV ACC, *
−
SP[
6bit
]
{
<<
shift
}
MOV ACC, *
−
SP{
6bit
}
{
<<
shift
}
For example, you could use either of the following instructions:
MOV ACC, *−SP[5]
MOV ACC, *−SP[5]<< 4
-
In most cases, hexadecimal numbers are shown with a subscript of 16. For
example, the hexadecimal number 40 would be shown as 40
16
. An excep-
tion to this rule is a hexadecimal number in a code example; these hexade-
cimal numbers have the suffix h. For example, the number 40 in the follow-
ing code is a hexadecimal 40.
MOVB AR0,#40h
Similarly, binary numbers usually are shown with a subscript of 2. For ex-
ample, the binary number 4 would be shown as 0100
2
. Binary numbers in
example code have the suffix b. For example, the following code uses a
binary 4.
MOVB AR0,#0100b
-
Bus signals and bits are sometimes represented with the following nota-
tions:
Notation
Description
Example
Bus(n:m)
Signals n through m of bus
PRDB(31:0) represents the 32
signals of the program-read data
bus (PRDB).
Register(n:m)
Bits n through m of register
T(3:0) represents the 4 least sig-
nificant bits of the T register.
Register(n)
Bit n of register
IER(4) represents bit 4 of the in-
terrupt enable register (IER).
Summary of Contents for TMS320C28x
Page 30: ...1 12...
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Page 269: ...IN loc16 PA 6 112 MOV AL 0 AL 0 UOUT IORegC AL IOspace IORegC AL 10...
Page 308: ...MAXCUL P loc32 6 151 Saturate MOVL Var64 2 ACC Store result into Var64 MOVL Var64 P...
Page 509: ...SUBL ACC P PM 6 352 SUBL ACC P PM ACC S B 11 M X 4 MOVH Y ACC 5 Store Q15 result into Y...
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