Texas Instruments TMS320C28x, Reference Manual

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SQRS loc16
6-331
SQRS loc16 Square Value and Subtract P From ACC
SYNTAX OPTIONS OPCODE OBJMODE RPT CYC
SQRS loc16
0101 0110 0001 0001
xxxx xxxx LLLL LLLL
1 Y N+1
Operands loc16 Addressing mode (see Chapter 5)
Description Subtract the previous product (stored in the P register), shifted by the
amount specified by the product shift mode (PM), from the ACC register.
Then the content of the location pointed to by the “loc16” addressing mode is
loaded into the T register, squared, and stored in the P register:
ACC = ACC − P << PM;
T = [loc16];
P = T * [loc16];
Flags and
Modes
Z After the addition, the Z flag is set if the ACC value is zero, else Z is cleared.
N After the subtraction, the N flag is set if bit 31 of the ACC is 1, else N is
cleared.
C If the subtraction generates a borrow, C is cleared; otherwise C is set.
V If an overflow occurs, V is set; otherwise V is not affected.
OVC If overflow mode is disabled; and if the operation generates a positive
overflow, then the counter is incremented. If overflow mode is disabled; and if
the operation generates a negative overflow, then the counter is
decremented.
OVM If overflow mode bit is set; then the ACC value will saturate maximum
positive (0x7FFFFFFF) or maximum negative (0x80000000) if the operation
overflowed.
PM The value in the PM bits sets the shift mode for the output operation from the
product register. If the product shift value is positive (logical left shift
operation), then the low bits are zero filled. If the product shift value is
negative (arithmetic right shift operation), the upper bits are sign extended.
Repeat This instruction is repeatable. If the operation follows a RPT instruction, then
it will be executed N+1 times. The state of the Z, N, C and OVC flags will
reflect the final result. The V flag will be set if an intermediate overflow
occurs.