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MOVB AX.LSB, loc16
6-190
MOVB AX.LSB, loc16
Load Byte Value
SYNTAX OPTIONS
OPCODE
OBJMODE
RPT
CYC
MOVB AX.LSB, loc16
1100 011A LLLL LLLL
X
−
1
Operands
AX.LS
B
Least significant byte of accumulator high (AH.LSB) or accumulator low
(AL.LSB) register
loc16
Addressing mode (see Chapter 5)
Description
Load the least significant byte of the specified AX register (AH.LSB or
AL.LSB) with 8 bits from the location pointed to by the “loc16” addressing
mode. The most significant byte of AX is cleared. The form of the “loc16”
operand determines which of its 8 bits are used to load AX.LSB:
if(loc16 = *+XARn[offset])
{
if(offset is an even number)
AX.LSB = [loc16.LSB];
if(offset is an odd value)
AX.LSB = [loc16.MSB];
}
else
AX.LSB = [loc16.LSB];
AX.MSB = 0x00;
Note:
offset = 3-bit immediate or AR0 or AR1 indexed addressing modes only.
For the following address modes, the returned result is undefined:
*AR6%++
(AMODE = 0)
*0++
(AMODE = x)
*0
−−
(AMODE = x)
*BR0++
(AMODE = x)
*BR0
−−
(AMODE = x)
*0++, ARPn
(AMODE = 1)
*0
−−
, ARPn
(AMODE = 1)
*BR0++, ARPn
(AMODE = 1)
*BR0
−−
, ARPn
(AMODE = 1)
Flags and
Modes
Z
After the move, AX is tested for a zero condition. The zero flag bit is set if
AX = 0; otherwise it is cleared
N
After the move, AX is tested for a negative condition. The bit is set if bit 15 of
AX is 1; otherwise it is cleared.
Summary of Contents for TMS320C28x
Page 30: ...1 12...
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Page 269: ...IN loc16 PA 6 112 MOV AL 0 AL 0 UOUT IORegC AL IOspace IORegC AL 10...
Page 308: ...MAXCUL P loc32 6 151 Saturate MOVL Var64 2 ACC Store result into Var64 MOVL Var64 P...
Page 509: ...SUBL ACC P PM 6 352 SUBL ACC P PM ACC S B 11 M X 4 MOVH Y ACC 5 Store Q15 result into Y...
Page 585: ...This page intentionally left blank 7 32 This page intentionally left blank...