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Pipelining of Instructions
4-6
Example 4
−
1. Relationship Between Pipeline and Address Counters FC, IC, and PC
IC
Program memory (32 bits wide)
Instruction 1
Instruction 2
Instruction 3
Instruction 4
Instruction 5
Instruction 6
Instruction 7
Instruction 8
Instruction 9
Instruction 10
Instruction 11
.
.
.
.
.
.
00
0051
16
00
0053
16
00
0055
16
00
0057
16
00
0059
16
00
005B
16
00
005D
16
00
005C
16
00
005A
16
00
0058
16
00
0056
16
00
0054
16
00
0052
16
00
0050
16
I C
Instruction 2
Instruction 3
Instruction-fetch queue (32 bits wide)
Instruction register (32 bits wide)
Instruction 1
FC
F1: Instructions 4 and 5
F2: Instruction 3
D1: Instruction 2
D2: Instruction 1
The remainder of this document refers almost exclusively to the PC. The FC
and the IC are visible in only limited ways. For example, when a call is executed
or an interrupt is initiated, the IC value is saved to the stack or to auxiliary regis-
ter XAR7.
Summary of Contents for TMS320C28x
Page 30: ...1 12...
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Page 269: ...IN loc16 PA 6 112 MOV AL 0 AL 0 UOUT IORegC AL IOspace IORegC AL 10...
Page 308: ...MAXCUL P loc32 6 151 Saturate MOVL Var64 2 ACC Store result into Var64 MOVL Var64 P...
Page 509: ...SUBL ACC P PM 6 352 SUBL ACC P PM ACC S B 11 M X 4 MOVH Y ACC 5 Store Q15 result into Y...
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