
G-13
Glossary
LSB:
When used in a syntax of the MOVB instruction, LSB means least sig-
nificant byte. Otherwise, LSB means least significant bit. See
least signif-
icant bit (LSB)
and
least significant byte (LSByte)
.
LSByte:
See
least significant byte (LSByte)
.
M
maskable interrupt:
An interrupt that can be disabled by software so that
the CPU does not service it until it is enabled by software. See also
non-
maskable interrupt
.
memory interface:
The buses and signals responsible for carrying commu-
nications between the core and on-chip memory/peripherals.
memory-mapped register:
A register that can be accessed at addresses
in data space.
memory wrapper:
The hardware around a memory block that identifies ac-
cess requests and controls accesses for that memory block.
mirror:
A range of addresses that is the same size and is mapped to the
same physical memory block as another range of addresses.
most significant bit (MSB):
The bit in the highest position of a binary num-
ber. For example, the MSB of a 16-bit register value is bit 15. See also
LSB
,
LSByte
, and
MSByte
.
most significant byte (MSByte):
The byte in the highest position of a binary
value. The MSByte of a value consists of the eight MSBs. See also
LSByte
,
LSB
, and
MSB
.
MSB:
When used in a syntax of the MOVB instruction, MSB means most sig-
nificant byte. Otherwise MSB means most significant bit. See
most sig-
nificant bit (MSB)
and
most significant byte (MSByte)
.
MSByte:
See
most significant byte (MSByte)
.
multiplicand register (T):
The primary function of this register, also called
the T register, is to hold one of the values to be multiplied during a multi-
plication. The following shift instructions use the four LSBs to hold the
shift count: ASR (arithmetic shift right), LSL (logical shift left), LSR (log-
ical shift right), and SFR (shift accumulator right). The T register can also
be used as a general-purpose 16-bit register.
Glossary
Summary of Contents for TMS320C28x
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Page 269: ...IN loc16 PA 6 112 MOV AL 0 AL 0 UOUT IORegC AL IOspace IORegC AL 10...
Page 308: ...MAXCUL P loc32 6 151 Saturate MOVL Var64 2 ACC Store result into Var64 MOVL Var64 P...
Page 509: ...SUBL ACC P PM 6 352 SUBL ACC P PM ACC S B 11 M X 4 MOVH Y ACC 5 Store Q15 result into Y...
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