Sun Microsystems Netra CT 410, Service Manual

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4-32 Netra CT Server Service Manual • February 2007
4.7.9.2 EBus DMA/TCR Registers
The diagnostic EBus DMA/TCR registers performs the following:
■
The
dma_reg_test
: Performs a walk1 bit test for control status register, address
register, and byte count register of each channel. Verifies that the control status
register is set properly.
■
The
dma_func_test
: Validates the direct memory access (DMA) capabilities and
first in, first out (FIFO). The test is executed in a DMA diagnostic loopback mode.
It initializes the data of transmitting memory with its address, performs a DMA
read and write, and verifies that the data received is correct. This diagnostic is
repeated for four channels.
CODE EXAMPLE 4-8
shows the EBus DMA/TCR registers output message.
4.7.9.3 Ethernet
The Ethernet diagnostic performs the following:
■ my_channel_reset
: Resets the Ethernet channel.
■ hme_reg_test
: Performs walk1 on the following registers set: global register 1,
global register 2, bmac xif register, bmac tx register, and the mif register.
■ MAC_internal_loopback_test
: Performs Ethernet channel engine internal
loopback.
■
10_mb_xcvr_loopback_test
: Enables the 10Base-T data present at the transmit
MII data inputs to be routed back to the receive MII data outputs.
■
100_mb_phy_loopback_test
: Enables MII transmit data to be routed to the MII
receive data path.
■ 100_mb_twister_loopback_test
: Forces the twisted-pair transceiver into
loopback mode.
CODE EXAMPLE 4-8
EBus DMA/TCR Registers Output Message
Enter (0-14 tests, 15 -Quit, 16 -Menu) ===> 1
TEST= all_dma/ebus_test
SUBTEST= dma_reg_test
SUBTEST= dma_func_test
Enter (0-14 tests, 15 -Quit, 16 -Menu) ===>