Appendix A
Connector Pinouts
A-15
A.1.2.6
CompactPCI J1/P1 Signal Descriptions
Caution –
Backplane power input (VIO)
must
be 5V.
TABLE A-8
CompactPCI J1/P1 Signal Descriptions
Signal Name
Description
+EP_5V
Backplane power input, EP_5V.
+EP_3.3V
Backplane power input, EP_3.3V.
+EP_12V
Backplane power input, EP_12V.
-EP_12V
Backplane power input, -EP_12V.
VIO
Backplane power input, which
must
be EP_5V.
LP_*
Long power pins. Refer to the PCIMG Hot Swap Spec R2.0, Section 4.2.1.
CPCI_RST#
cPCI reset.
CPCI_CLK[7..0]
cPCI clock. Provides timing for all cPCI transactions.
CPCI_AD[63..0]
cPCI bus Interface 64-bit multiplexed address and data.
CPCI_C/BE[7..0]#
cPCI bus command and byte enables; multiplexed on the same PCI signals.
CPCI_FRAME#
cPCI frame. Indicates the beginning of a PCI bus cycle.
CPCI_DEVSEL#
cPCI device select. Indicates PCI device response to selection.
CPCI_IRDY#
cPCI initiator ready. indicate bus master ability to complete the current data phase.
CPCI_TRDY#
cPCI target ready. Indicates target ability to complete the current data phase.
CPCI_STOP#
cPCI stop. Indicates initiator or target is requesting to stop the current transaction.
CPCI_IDSEL
cPCI initialization device select. Chip select during configuration read and write.
CPCI_REQ64#
cPCI request 64-bit transfer.
CPCI_ACK64#
cPCI Acknowledge 64-bit Transfer.
CPCI_PAR
cPCI parity bit. Calculated across AD[31..0] and C/BE[3..0].
CPCI_PERR#
Parity error.
CPCI_SERR#
cPCI system error.
CPCI_INT[A-D]
cPCI interrupts.
CPCI_REQ[7..0]#
cPCI request. Indicates to arbiter an agent desires use of the cPCI bus.
CPCI_GNT[7..0]#
cPCI grant. Indicates to agent access to the bus has been granted.
CPCI_BD_SEL#
PICMG 2.1 R1.0 hot-swap signal. Indicate board presence, SC drives to power on.
CPCI_ENUM#
PICMG 2.1 R1.0 hot-swap signal. Send or receive insertion or extraction event.
Summary of Contents for Netra CT 410
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