Digital Standard PDC
SMIQ
1125.5555.03
2.286
E-9
(TRIGGER...)
EXT RETRIGGER
INHIBIT
Setting the number of symbols for which a restart is
inhibited after a trigger event.
With TRIGGER MODE RETRIG selected, each new
trigger signal restarts the PDC signal generation.
This restart can be inhibited for the entered number
of symbols.
Example:
The entry of 1000 symbols causes new trigger
signals to be ignored for the duration of 1000 sym-
bols after a trigger event
IEC/IEEE-bus
:SOUR:PDC:TRIG:INH 1000
TRIGGER OUT 2
DELAY
Input value of delay of trigger signal at TRIGOUT 2
output compared with beginning of frame.
IEC/IEEE-bus
:SOUR:PDC:TRIG:OUTP:DEL 2
TRIGGER OUT2
PERIOD
Input value of output signal period at TRIGOUT 2
output given in frames.
IEC/IEEE-bus
:SOUR:PDC:TRIG:OUTP:PER 1
CLOCK...
Opens a window for selecting the clock source and for setting a delay.
FREQ
100. 000 000 0
MHz
FREQUENCY
LEVEL
ANALOG MOD
VECTOR MOD
DIGITAL MOD
DIGITAL STD
LF OUTPUT
SWEEP
LIST
MEM SEQ
UTILITIES
PDC
PHS
IS95
NADC
PDC
GSM
STATE
MODULATION...
TRIGGER MODE
EXECUTE TRIG
TRIGGER....
CLOCK...
POWER RAMP C>
SLOT ATENUA
0
TCH
CLOCK SOURCE
INT
EXT
MODE
SYMBOL
BIT
DELAY
0.00 Symb
LEVEL
- 30.0
dBm
PEP
- 27.4
dBm
Fig. 2-188
Menu DIGITAL STD - PDC - CLOCK..., SMIQ equipped with Modulation Coder SMIQB20
and Data Generator SMIQB11