CHAPTER 20 STANDBY FUNCTION
Page 731 of 920
CHAPTER 20 STANDBY FUNCTION
20.1
Standby Function
The standby function reduces the operating current of the system, and the following three modes are available.
(1) HALT mode
HALT instruction execution sets the HALT mode. In the HALT mode, the CPU operation clock is stopped. If the
high-speed system clock oscillator, high-speed on-chip oscillator, or subsystem clock oscillator is operating
before the HALT mode is set, oscillation of each clock continues. In this mode, the operating current is not
decreased as much as in the STOP mode, but the HALT mode is effective for restarting operation immediately
upon interrupt request generation and carrying out intermittent operations frequently.
(2) STOP mode
STOP instruction execution sets the STOP mode. In the STOP mode, the high-speed system clock oscillator
and high-speed on-chip oscillator stop, stopping the whole system, thereby considerably reducing the CPU
operating current.
Because this mode can be cleared by an interrupt request, it enables intermittent operations to be carried out.
However, because a wait time is required to secure the oscillation stabilization time after the STOP mode is
released when the X1 clock is selected, select the HALT mode if it is necessary to start processing immediately
upon interrupt request generation.
(3) SNOOZE mode
In the case of an A/D conversion request by the timer trigger signal (the interrupt request signal
(INTRTC/INTIT) or ELC event input), and DTC start source, the STOP mode is exited, A/D conversion is
performed, and DTC start source without operating the CPU. This can only be specified when the high-speed
on-chip oscillator is selected for the CPU/peripheral hardware clock (f
CLK
).
In either of these two modes, all the contents of registers, flags and data memory just before the standby mode
is set are held. The I/O port output latches and output buffer statuses are also held.
Summary of Contents for RL78/G1H
Page 941: ...R01UH0575EJ0120 RL78 G1H...
