CHAPTER 13 A/D CONVERTER
Page 290 of 920
Note
These are the numbers of clock cycles when conversion is with 10-bit resolution. When eight-bit resolution is selected,
the values are shorter by two cycles of the conversion clock (f
AD
).
Caution 1. The A/D conversion time must also be within the relevant range of conversion times (t
CONV
) described in 31.6.1
Caution 2. Rewrite the FR2 to FR0, LV1 and LV0 bits to other than the same data while conversion is stopped (ADCS = 0,
ADCE = 0).
Caution 3. The above conversion time does not include conversion state time. Conversion state time add in the first
conversion. Select conversion time, taking clock frequency errors into consideration.
Remark
f
CLK
:
CPU/peripheral hardware clock frequency
Table 13 - 3 A/D Conversion Time Selection (1/4)
(1) When there is no A/D power supply stabilization wait time Normal mode 1, 2
(software trigger mode/hardware trigger no-wait mode)
A/D Converter Mode
Register 0 (ADM0)
Mode
Conversion
Clock (f
AD
)
Number of
Conversion
Clock
Conversion
Time
Conversion Time at 10-Bit Resolution
2.7 V
≤
V
DD
≤
3.6 V
FR2 FR1 FR0 LV1 LV0
f
CLK
=
1 MHz
f
CLK
=
4 MHz
f
CLK
=
8 MHz
f
CLK
=
16 MHz
f
CLK
=
32 MHz
0
0
0
0
0
Normal
1
f
CLK
/64
19 f
AD
(number of
sampling clock:
7 f
AD
)
1216/f
CLK
Setting
prohibited
Setting
prohibited
Setting
prohibited
76
μ
s
38
μ
s
0
0
1
f
CLK
/32
608/f
CLK
76
μ
s
38
μ
s
19
μ
s
0
1
0
f
CLK
/16
304/f
CLK
76
μ
s
38
μ
s
19
μ
s
9.5
μ
s
0
1
1
f
CLK
/8
152/f
CLK
38
μ
s
19
μ
s
9.5
μ
s
4.75
μ
s
1
0
0
f
CLK
/6
114/f
CLK
28.5
μ
s
14.25
μ
s
7.125
μ
s
3.5625
μ
s
1
0
1
f
CLK
/5
95/f
CLK
95
μ
s
23.75
μ
s
11.875
μ
s
5.938
μ
s
2.9688
μ
s
1
1
0
f
CLK
/4
76/f
CLK
76
μ
s
19
μ
s
9.5
μ
s
4.75
μ
s
2.375
μ
s
1
1
1
f
CLK
/2
38/f
CLK
38
μ
s
9.5
μ
s
4.75
μ
s
2.375
μ
s
Setting
prohibited
0
0
0
0
1
Normal
2
f
CLK
/64
17 f
AD
(number of
sampling clock:
5 f
AD
)
1088/f
CLK
Setting
prohibited
Setting
prohibited
Setting
prohibited
68
μ
s
34
μ
s
0
0
1
f
CLK
/32
544/f
CLK
68
μ
s
34
μ
s
17
μ
s
0
1
0
f
CLK
/16
272/f
CLK
68
μ
s
34
μ
s
17
μ
s
8.5
μ
s
0
1
1
f
CLK
/8
136/f
CLK
34
μ
s
17
μ
s
8.5
μ
s
4.25
μ
s
1
0
0
f
CLK
/6
102/f
CLK
25.5
μ
s
12.75
μ
s
6.375
μ
s
3.1875
μ
s
1
0
1
f
CLK
/5
85/f
CLK
85
μ
s
21.25
μ
s
10.625
μ
s
5.3125
μ
s
2.6563
μ
s
1
1
0
f
CLK
/4
68/f
CLK
68
μ
s
17
μ
s
8.5
μ
s
4.25
μ
s
2.125
μ
s
1
1
1
f
CLK
/2
34/f
CLK
34
μ
s
8.5
μ
s
4.25
μ
s
2.125
μ
s
Setting
prohibited
Summary of Contents for RL78/G1H
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