Renesas RL78/G1H, User Manual

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RL78/G1H CHAPTER 15 SERIAL INTERFACE IICA
R01UH0575EJ0120 Rev. 1.20 Page 447 of 920
Dec 22, 2016
15.4 I
2
C Bus Mode Functions
15.4.1 Pin configuration
The serial clock pin (SCLAn) and the serial data bus pin (SDAAn) are configured as follows.
(1) SCLAn...... This pin is used for serial clock input and output.
This pin is an N-ch open-drain output for both master and slave devices. Input is Schmitt input.
(2) SDAAn .....This pin is used for serial data input and output.
This pin is an N-ch open-drain output for both master and slave devices. Input is Schmitt input.
Since outputs from the serial clock line and the serial data bus line are N-ch open-drain outputs, an external
pull-up resistor is required.
Figure 15 - 18 Pin Configuration Diagram
Remark n = 0, 1
Master device
SCLAn
SDAAn
V
DD
(Clock output)
Clock input
Data output
Data input
V
SS
Slave device
SCLAn
SDAAn
V
DD
V
SS
V
SS
V
SS
Clock output
(Clock input)
Data output
Data input