Renesas RL78/G1H, User Manual

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RL78/G1H CHAPTER 5 PORT FUNCTIONS
R01UH0575EJ0120 Rev. 1.20 Page 82 of 920
Dec 22, 2016
5.3.5 Port output mode registers (POMxx)
These registers set the output mode in 1-bit units.
N-ch open-drain output (V
DD
tolerance) mode can be selected during serial communication with an external
device of the different potential.
In addition, POMxx register is set with PUxx register, whether or not to use the on-chip pull-up resistor.
These registers can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears these registers to 00H.
Caution An on-chip pull-up resistor is not connected to a bit for which N-ch open-drain output (V
DD
tolerance) mode (POMmn = 1) is set.
Figure 5 - 5 Format of Port output mode register
Caution Be sure to set bits that are not mounted to their initial values.
Symbol 7 6 5 4 3 2 1 0 Address After reset R/W
POM0 0 0 0 POM04 POM03 POM02 0 0 F0050H 00H R/W
POM7 0 0 0 0 0 0 POM71 0 F0057H 00H R/W
POM8 0 0 0 0 0 POM82 POM81 POM80 F0058H 00H R/W
POM14 0 0 0 POM144 POM143 POM142 0 0 F005EH 00H R/W
POMmn Pmn pin output mode selection (m = 0, 1, 3 to 5, 7, 8, 14; n = 0 to 5, 7)
0 Normal output mode
1 N-ch open-drain output (V
DD
tolerance) mode