CHAPTER 16 DATA TRANSFER CONTROLLER (DTC)
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16.5.3
DTC Pending Instruction
Even if a DTC transfer request is generated, DTC transfer is held pending immediately after the following
instructions. Also, the DTC is not activated between PREFIX instruction code and the instruction immediately
after that code.
• Call/return instruction
• Unconditional branch instruction
• Conditional branch instruction
• Read access instruction for code flash memory
• Bit manipulation instructions for IFxx, MKxx, PRxx, and PSW, and an 8-bit manipulation instruction that has the
ES register as operand
• Instruction for accessing the data flash memory
Caution 1. When a DTC transfer request is acknowledged, all interrupt requests are held pending until
DTC transfer is completed.
Caution 2. While the DTC is held pending by the DTC pending instruction, all interrupt requests are held
pending.
16.5.4
Operation when Accessing Data Flash Memory Space
When accessing the data flash space after an instruction execution from the start of DTC data transfer, a wait of
three clock cycles will be inserted to the next instruction.
Instruction 1
DTC data transfer
Instruction 2
←
The wait of three clock cycles occurs.
MOV A,
! Data Flash space
Summary of Contents for RL78/G1H
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