Renesas RL78/G1H, User Manual

Page: 744 / 941

RL78/G1H CHAPTER 19 INTERRUPT FUNCTIONS
R01UH0575EJ0120 Rev. 1.20 Page 726 of 920
Dec 22, 2016
Figure 19 - 13 Examples of Multiple Interrupt Servicing (1/2)
Example 1. Multiple interrupt servicing occurs twice
During servicing of interrupt INTxx, two interrupt requests, INTyy and INTzz, are acknowledged, and multiple
interrupt servicing takes place. Before each interrupt request is acknowledged, the EI instruction must always be
issued to enable interrupt request acknowledgment.
Example 2. Multiple interrupt servicing does not occur due to priority control
Interrupt request INTyy issued during servicing of interrupt INTxx is not acknowledged because its priority is
lower than that of INTxx, and multiple interrupt servicing does not take place. The INTyy interrupt request is held
pending, and is acknowledged following execution of one main processing instruction.
PR = 00: Specify level 0 with xxPR1x = 0, xxPR0x = 0 (higher priority level)
PR = 01: Specify level 1 with xxPR1x = 0, xxPR0x = 1
PR = 10: Specify level 2 with xxPR1x = 1, xxPR0x = 0
PR = 11: Specify level 3 with xxPR1x = 1, xxPR0x = 1 (lower priority level)
IE = 0: Interrupt request acknowledgment is disabled
IE = 1: Interrupt request acknowledgment is enabled.
EI
EI EI
RETI RETI
RETI
IE = 0 IE = 0 IE = 0
IE = 1 IE = 1 IE = 1
Main processing
INTxx servicing INTyy servicing INTzz servicing
INTxx
(PR = 11)
INTyy
(PR = 10)
INTzz
(PR = 01)
EI
RETI
Main processing
IE = 0
IE = 1
IE = 1
IE = 0 EI
1 instruction execution
RETI
INTxx servicing INTyy servicing
INTxx
(PR = 10)
INTyy
(PR = 11)