UM11029
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© NXP Semiconductors N.V. 2017. All rights reserved.
User manual
Rev. 1.0 — 16 June 2017
452 of 515
NXP Semiconductors
UM11029
Chapter 26: LPC84x 12-bit Analog-to-Digital Converter (ADC)
26.6.4 A/D Global Data Register A and B
The A/D Global Data Registers contain the result of the most recent A/D conversion
completed under each conversion sequence.
Results of A/D conversions can be read in one of two ways. One is to use these A/D
Global Data Registers to read data from the ADC at the end of each A/D conversion.
Another is to read the individual A/D Channel Data Registers, typically after the entire
sequence has completed. It is recommended to use one method consistently for a given
conversion sequence.
The global registers are useful in conjunction with DMA operation - particularly when the
channels selected for conversion are not sequential (hence the addresses of the
individual result registers will not be sequential, making it difficult for the DMA engine to
address them). For interrupt-driven code it will more likely be advantageous to wait for an
entire sequence to complete and then retrieve the results from the individual channel
registers.
Remark:
The method to be employed for each sequence should be reflected in the
MODE bit in the corresponding ADSEQn_CTRL register since this will impact interrupt
and overrun flag generation.
Table 446. A/D Sequence A Global Data Register (SEQA_GDAT, address 0x4001 C010) bit description
Bit
Symbol
Description
Reset
value
3:0
-
Reserved, user software should not write ones to reserved bits. The value read
from a reserved bit is not defined.
NA
15:4
RESULT
This field contains the 12-bit A/D conversion result from the most recent conversion
performed under conversion sequence associated with this register.
The result is the a binary fraction representing the voltage on the
currently-selected input channel as it falls within the range of V
REFP
to V
REFN
. Zero
in the field indicates that the voltage on the input pin was less than, equal to, or
close to that on V
REFN
, while 0xFFF indicates that the voltage on the input was
close to, equal to, or greater than that on V
REFP
.
DATAVALID = 1 indicates that this result has not yet been read.
NA
17:16
THCMPRANGE
Indicates whether the result of the last conversion performed was above, below or
within the range established by the designated threshold comparison registers
(THRn_LOW and THRn_HIGH).
19:18
THCMPCROSS
Indicates whether the result of the last conversion performed represented a
crossing of the threshold level established by the designated LOW threshold
comparison register (THRn_LOW) and, if so, in what direction the crossing
occurred.
25:20
-
Reserved, user software should not write ones to reserved bits. The value read
from a reserved bit is not defined.
NA
