UM11029
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© NXP Semiconductors N.V. 2017. All rights reserved.
User manual
Rev. 1.0 — 16 June 2017
373 of 515
21.1 How to read this chapter
The SCTimer/PWM is available on all LPC84x devices.
Remark:
For a detailed description of SCTimer/PWM applications and code examples,
21.2 Features
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The SCTimer/PWM supports:
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Five inputs: Four inputs with multiple connection options through the input MUX.
The fifth input is from the clock generator sct_clk.
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Seven outputs.
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Eight match/capture registers.
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Eight events.
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Eight states.
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Counter/timer features:
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Each SCTimer is configurable as two 16-bit counters or one 32-bit counter.
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Counters clocked by system clock or selected input.
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Configurable as up counters or up-down counters.
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Configurable number of match and capture registers. Up to five match and capture
registers total.
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When there is a match and/or an input or output transition or level, create events to
accomplish any or all of the following: stop, limit or halt the timer; change counting
direction; set, clear or toggle outputs; change the state; capture the counter value;
generate an interrupt or DMA request.
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Counter value can be loaded into capture register triggered by a match or
input/output toggle.
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PWM features:
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Counters can be used in conjunction with match registers to toggle outputs and
create time-proportioned PWM signals.
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PWM behavior can change based on the current state to create very complex,
variable waveforms. In effect, states are a means of context switching for the entire
SCTimer/PWM.
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Up to 6 single-edge or dual-edge PWM outputs with independent duty cycle and
common PWM cycle length.
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Event creation features:
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The following conditions define an event: a counter match condition, an input (or
output) condition such as an rising or falling edge or level, a combination of match
and/or input/output condition. Event creation is qualified by States (“contexts”).
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In bidirectional mode, events can be enabled based on the count direction.
UM11029
Chapter 21: LPC84x SCTimer/PWM
Rev. 1.0 — 16 June 2017
User manual
