NXP Semiconductors freescale semiconductor MC13211, Reference Manual

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MC1321x Serial Peripheral Interface (SPI)
MC1321x Reference Manual, Rev. 1.6
Freescale Semiconductor 4-23
4.13.1.2 SPI1C2 Register settings
The following register settings apply:
• MODFEN (Bit 4) = 0 - SS1 reverts to GPIO controlled as PTE2 (default)
• BIDIROE (Bit 3) = 0 - Has no meaning for selected mode (default)
• SPISWAI (Bit 1) - Used to control SPI clock in Wait Mode as required
• SPC0 (Bit 0) - Use separate pins for data in and data out (default)
4.13.1.3 GPIO PTE2 Control (Used as SS1)
The PTE2/SS1 is used to control to the modem CE input, however, the MCU SPI module does not support
use of this signal in the manner required by the modem protocol. As a result, the signal is enabled as a
GPIO and is controlled through the port E control registers. PTE2 must be programmed as an output and
its state set via software to properly bracket SPI byte transactions. For more on control of port E, see
Section 13.3.5, “Port E, SCI1, and SPI” .
4.13.2 SPI Baud Rate Control
The software supporting 802.15.4 Standard applications or ZigBee applications often requires an MCU
bus clock of 8 MHz or 16 MHz. The SPI baud rate is generated directly from the bus clock and the
maximum baud rate is one half the bus clock rate. This translates to a baud rate of 4 MHz for an 8 MHz
bus clock and a baud rate of 8 MHz (max spec limit) for a 16 MHz bus clock. A slower baud rate can be
tried, but it may impact performance of the software in transferring data to/from the modem and lengthen
the initialization time of the modem.
To get maximum baud rate, the baud rate generator must be set to a minimum divide ratio of 2, i.e, where
the prescaler is set to “1” and the clock rate divider is set to “2”. For the SPI baud rate register SPIBR:
• SPPR[2:0] = 0b000 - Prescaler divisor is “1” (default)
• SPR[2:0] = 0b000 - Baud rate divisor is “2” (default)
NOTE
The default condition for SPI1BR may be used.