NXP Semiconductors freescale semiconductor MC13211, Reference Manual

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Modem SPI Register Descriptions
MC1321x Reference Manual, Rev. 1.6
Freescale Semiconductor 5-21
5.20 Tmr_Cmp1_B - Register 1C
The Tmr_CMP1_B Register 1C stores the least significant 16 bits of the 24-bit compare value. Writing to
Register 1C causes an internal load of the full 24-bit comparator value (see
Section 5.19, “Tmr_Cmp1_A
- Register 1B” ) and activates the mode presently set into the tmr_cmp1_dis control bite.
Register 1B
0x1B
BIT 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
tmr_cmp1
_di
s
tmr_cmp1[23:16]
TYPE r/w r/w
RESET
0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1
0x00FF
Table 5-20. Register 1B Description
Name Description Operation
Bits 14-8 Reserved Leave default
Bit 15 tmr_cmp1_dis — This bit disables the Event Timer Comparator 1
function.
1 = Disables the Event Timer Compare 1
function.
0 = Enables the Event Timer Compare 1
function (default).
Bits 7-0 tmr_cmp1[23:16] — These bits represent the 8 most significant bits
of 24-bit Event Timer 1 absolute time compare value,
tmr_cmp1[23:0].
Default is 0xFF.
Register 1C 0x1C
BIT 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
tmr_cmp1[15:0]
TYPE r/w
RESET
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
0xFFFF
Table 5-21. Register 1C Description
Name Description Operation
Bits 15-0 tmr_cmp1[15:0] — These bits represent the 16 least significant bits
of 24-bit Event Timer 1 absolute time compare value, tmr_cmp1[23:0].
Default is 0xFFFF.