NXP Semiconductors freescale semiconductor MC13211, Reference Manual

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Inter-Integrated Circuit (IIC)
MC1321x Reference Manual, Rev. 1.6
Freescale Semiconductor 19-3
19.3 External Signal Description
This section describes each user-accessible pin signal.
19.3.1 SCL — Serial Clock Line
The bidirectional SCL is the serial clock line of the IIC system.
19.3.2 SDA — Serial Data Line
The bidirectional SDA is the serial data line of the IIC system.
19.4 Register Definitions
This section provides a detailed description of all IIC registers accessible to the end user.
19.4.1 Module Memory Map
The IIC has five 8-bit registers. The base address of the module is hardware programmable. The IIC
register map is fixed and begins at the module’s base address.
Figure 19-2 summarizes the IIC module’s
address space. The following section describes the bit-level arrangement and functionality of each register.
Table 19-2. Module Memory Map
Address Use Access
Base + $0000 IIC Address Register (IICA) read/write
Base + $0001 IIC Frequency Divider Register (IICF) read/write
Base + $0002 IIC Control Register (IICC) read/write
Base + $0003 IIC Status Register (IICS) read
Base + $0004 IIC Data IO Register (IICD) read/write