NXP Semiconductors freescale semiconductor MC13211, Reference Manual

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Modem Timer Information
MC1321x Reference Manual, Rev. 1.6
6-2 Freescale Semiconductor
6.2 Event Timer Time Base
The Event Timer’s base clock (tmr_clk) is derived from a programmable prescaler which is clocked by the
16 MHz crystal source. The prescaler provides counter input frequencies from 2 MHz down to
15.625 kHz, which sets the granularity and resolution of the current time. The prescaler, and thus the Event
Timer only increment when the crystal oscillator is active. The field tmr_prescale[2:0] Control_C Register
9, Bits 2-0 (
Section 5.2, “Register Model and Description Details” ) establishes the tmr_clk frequency as
shown in Table 6-1 .
The 24-bit counter automatically rolls over upon reaching its maximum value, and the corresponding
maximum possible Event Timer durations are also provided in
Table 6-1 .
6.3 Setting Current Time
“Current Time” is defined as the value of the Event Timer internal counter. The current time is
programmable, but does not have to be programmed. In the reset condition, the MC1321x current time is
set to zero. Current time advances from zero at the tmr_clk clock rate and rolls over to zero after reaching
its maximum value.
Programming “current time” is accomplished by using three SPI registers:
1. Tmr_Cmp1_A Register 1B, Bits 7-0, tmr_cmp1[23:16]
2. Tmr_Cmp1_B Register 1C, Bits 15-0, tmr_cmp1[15:0]
3. Control_B Register 07, Bit 15, tmr_load
When field tmr_load is programmed to high, the value of “current time” is set to the value in
tmr_cmp1[23:0]. Thus, tmr_cmp1[23:0] is first programmed to the desired current time value, then
tmr_load is programmed to 1, which initiates the timer load. The change to the “current time” value occurs
within two crystal clock cycles, after which normal incrementing resumes on the next rising tmr_clk edge.
So, tmr_load is not required to be programmed to zero for the Event Timer to resume normal operation.
However, loading the Event Timer is a positive edge-triggered event, so tmr_load must be programmed
low prior to the next attempt to load the Event Timer.
Table 6-1. Event Timer Prescaler Settings
Register 9, Bits 2-0
tmr_prescale [2:0]
Event Timer
Time Base
Maximum Event
Timer Duration
000 2 MHz 8.389 seconds
001 1 MHz 16.777 seconds
010 500 kHz 33.554 seconds
011 (default) 250 kHz 67.109 seconds
100 125 kHz 134.218 seconds
101 62.5 kHz 268.436 seconds
110 31.25 kHz 536.871 seconds
111 15.625 kHz 1073.742 seconds