Modem SPI Register Descriptions
MC1321x Reference Manual, Rev. 1.6
Freescale Semiconductor
5-5
5.3
Reset - Register 00
Writing to Reset Register 00 causes a reset condition where the digital logic is reset, but the transceiver is
not powered down. The device is forced to the Idle Mode and the SPI registers are all reset and forced to
their default condition although all data in the Packet RAMs is retained. The reset is held as long as CE
remains asserted and is released when CE is negated high. A read of this register has no effect.
5.4
RX_Pkt_RAM - Register 01
The receive Packet RAM register is accessed when the MC1321x is being used in Packet Mode or Stream
Mode for data transfer. In Packet Mode once a packet has been received, the payload data is stored in the
RX Packet RAM and the length of the packet data is contained in Register 2D, Bit 6-0. A recursive read
(see
Section 4.11, “Modem SPI Recursive Transactions”
) to the RX_Pkt_RAM Register 01 is required to
access the RX packet payload data.
In Stream Mode, the receive payload data is accessed word-by-word via repeated read accesses on the SPI
bus. During Stream Mode when a valid data word is available in RX_Pkt_RAM, a rx_strm_irq status is
set and an interrupt is generated (it must be enabled). Reading the RX_Pkt_RAM register will clear the
rx_strm_irg interrupt so that reading the IRQ_Status Register 24 is not required (see
Mode Data Transfer TX and RX Operation”
).
Register 00
0x00
BIT
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
software_reset
TYPE
w
RESET
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0x0000
Table 5-2. Register 00 Description
Name
Description
Operation
Bits 15-0
software_reset
— Writing this register provides a software reset.
When there is a SPI write to Register 00, the IC is reset and stays
reset as long as CE remains asserted, and returns to normal
operation when CE is negated. Read of this register has no effect.
Write data is “don’t care”
Register 01
0x01
BIT
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
rx_pkt_ram[15:0]
TYPE
r/w
RESET
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
unknown from reset
Summary of Contents for freescale semiconductor MC13211
Page 40: ...MC1321x Pins and Connections MC1321x Reference Manual Rev 1 6 2 6 Freescale Semiconductor...
Page 166: ...Modem Modes of Operation MC1321x Reference Manual Rev 1 6 7 22 Freescale Semiconductor...
Page 172: ...Modem Interrupt Description MC1321x Reference Manual Rev 1 6 8 6 Freescale Semiconductor...
Page 186: ...MCU Modes of Operation MC1321x Reference Manual Rev 1 6 10 8 Freescale Semiconductor...
Page 208: ...MCU Memory MC1321x Reference Manual Rev 1 6 11 22 Freescale Semiconductor...
Page 244: ...MCU Parallel Input Output MC1321x Reference Manual Rev 1 6 13 20 Freescale Semiconductor...
Page 288: ...MCU Central Processor Unit CPU MC1321x Reference Manual Rev 1 6 15 20 Freescale Semiconductor...
Page 308: ...MCU Timer PWM TPM Module MC1321x Reference Manual Rev 1 6 17 16 Freescale Semiconductor...
Page 338: ...Inter Integrated Circuit IIC MC1321x Reference Manual Rev 1 6 19 14 Freescale Semiconductor...
Page 372: ...Development Support MC1321x Reference Manual Rev 1 6 21 20 Freescale Semiconductor...
