Analog to Digital (ATD) Module
MC1321x Reference Manual, Rev. 1.6
20-10
Freescale Semiconductor
20.6.1
ATD Control (ATDC)
Figure 20-4. ATD Control
Register (ATD1C)
Writes to the ATD control register will abort the current conversion, but will not start a new conversion.
ATDPU — ATD Power Up
This bit provides program on/off control over the ATD, reducing power consumption when the ATD
is not being used. When cleared, the ATDPU bit aborts any conversion in progress.
1 = ATD functionality.
0 = Disable the ATD and enter a low-power state.
DJM — Data Justification Mode
This bit determines how the 10-bit conversion result data maps onto the ATD result register bits. When
RES8 is set, bit DJM has no effect and the 8-bit result is always located in ATD1RH.
For Left-justified Mode, result data bits 9–2 map onto bits 7–0 of ATD1RH, result data bits 1 and 0
map onto ATD1RL bits 7 and 6, where bit 7 of ATD1RH is the most significant bit (MSB).
Figure 20-5. Left-Justified Mode
For Right-justified Mode, result data bits 9 and 8 map onto bits 1 and 0 of ATD1RH, result data bits
7–0 map onto ATD1RL bits 7–0, where bit 1 of ATD1RH is the most significant bit (MSB).
Figure 20-6. Right-Justified Mode
The effect of the DJM bit on the result is shown in
.
1 = Result register data is right justified.
0 = Result register data is left justified.
RES8 — ATD Resolution Select
This bit determines the resolution of the ATD converter, 8-bits or 10-bits. The ATD converter has the
accuracy of a 10-bit converter. However, if 8-bit compatibility is required, selecting 8-bit resolution
will map result data bits 9-2 onto ATD1RH bits 7-0.
Bit 7
6
5
4
3
2
1
Bit 0
Read:
Write:
Reset:
0
0
0
0
0
0
0
0
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
9
0
ATD1RH
ATD1RL
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
9
0
ATD1RH
ATD1RL
RE-
RE-
Summary of Contents for freescale semiconductor MC13211
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Page 208: ...MCU Memory MC1321x Reference Manual Rev 1 6 11 22 Freescale Semiconductor...
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Page 372: ...Development Support MC1321x Reference Manual Rev 1 6 21 20 Freescale Semiconductor...
