MC1321x Serial Peripheral Interface (SPI)
MC1321x Reference Manual, Rev. 1.6
4-12
Freescale Semiconductor
4.8.2
SPI Control Register 2 (SPI1C2)
This read/write register is used to control optional features of the SPI system. Bits 7, 6, 5, and 2 are not
implemented and always read 0.
Table 4-4. SS1 Pin Function
MODFEN
SSOE
Master Mode
Slave Mode
0
0
General-purpose I/O (not SPI)
Slave select input
0
1
General-purpose I/O (not SPI)
Slave select input
1
0
SS input for mode fault
Slave select input
1
1
Automatic SS output
Slave select input
7
6
5
4
3
2
1
0
R
0
0
0
MODFEN
BIDIROE
0
SPISWAI
SPC0
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 4-8. SPI Control Register 2 (SPI1C2)
Table 4-5. SPI1C2 Field Descriptions
Field
Description
4
MODFEN
Master Mode-Fault Function Enable
— When the SPI is configured for Slave Mode, this bit has no meaning or
effect. (The SS1 pin is the slave select input.) In Master Mode, this bit determines how the SS1 pin is used (refer
to
for more details).
0 Mode fault function disabled, master SS1 pin reverts to general-purpose I/O not controlled by SPI.
1 Mode fault function enabled, master SS1 pin acts as the mode fault input or the slave select output.
3
BIDIROE
Bidirectional Mode Output Enable
— When Bidirectional Mode is enabled by SPI pin control 0 (SPC0) = 1,
BIDIROE determines whether the SPI data output driver is enabled to the single bidirectional SPI I/O pin.
Depending on whether the SPI is configured as a master or a slave, it uses either the MOSI1 (MOMI) or MISO1
(SISO) pin, respectively, as the single SPI data I/O pin. When SPC0 = 0, BIDIROE has no meaning or effect.
0 0utput driver disabled so SPI data I/O pin acts as an input.
1 SPI I/O pin enabled as an output.
1
SPISWAI
SPI Stop in Wait Mode
0 SPI clocks continue to operate in Wait Mode.
1 SPI clocks stop when the MCU enters Wait Mode.
0
SPC0
SPI Pin Control 0
— The SPC0 bit chooses Single-wire Bidirectional Mode. If MSTR = 0 (Slave Mode), the SPI
uses the MISO1 (SISO) pin for bidirectional SPI data transfers. If MSTR = 1 (Master Mode), the SPI uses the
MOSI1 (MOMI) pin for bidirectional SPI data transfers. When SPC0 = 1, BIDIROE is used to enable or disable
the output driver for the single bidirectional SPI I/O pin.
0 SPI uses separate pins for data input and data output.
1 SPI configured for single-wire bidirectional operation.
Summary of Contents for freescale semiconductor MC13211
Page 40: ...MC1321x Pins and Connections MC1321x Reference Manual Rev 1 6 2 6 Freescale Semiconductor...
Page 166: ...Modem Modes of Operation MC1321x Reference Manual Rev 1 6 7 22 Freescale Semiconductor...
Page 172: ...Modem Interrupt Description MC1321x Reference Manual Rev 1 6 8 6 Freescale Semiconductor...
Page 186: ...MCU Modes of Operation MC1321x Reference Manual Rev 1 6 10 8 Freescale Semiconductor...
Page 208: ...MCU Memory MC1321x Reference Manual Rev 1 6 11 22 Freescale Semiconductor...
Page 244: ...MCU Parallel Input Output MC1321x Reference Manual Rev 1 6 13 20 Freescale Semiconductor...
Page 288: ...MCU Central Processor Unit CPU MC1321x Reference Manual Rev 1 6 15 20 Freescale Semiconductor...
Page 308: ...MCU Timer PWM TPM Module MC1321x Reference Manual Rev 1 6 17 16 Freescale Semiconductor...
Page 338: ...Inter Integrated Circuit IIC MC1321x Reference Manual Rev 1 6 19 14 Freescale Semiconductor...
Page 372: ...Development Support MC1321x Reference Manual Rev 1 6 21 20 Freescale Semiconductor...
