FX2N-16CCL-M CC-Link System Master Block
Specification 4
4-21
14)Write request for module reset: BFM#A
H
b4
Resets the module.
The module can be reset individually without resetting the PLC.
For the signal timing, refer to 5).
15)Write request for data link startup by buffer memory parameters: BFM#A
H
b6
Starts up the data link in accordance with the contents of the parameters in the buffer
memory.
For the signal timing, refer to 6) and 7).
16)Write request for data link startup by EEPROM parameters: BFM#A
H
b8
Starts up the data link in accordance with the contents of the parameters registered in the
EEPROM.
For the signal timing, refer to 8) and 9).
17)Write request for parameter registration to EEPROM: BFM#A
H
b10
Registers the parameters stored in the buffer memory to the EEPROM.
For the signal timing, refer to 10) and 11).
Summary of Contents for FX2N-16CCL-M
Page 4: ...FX2N 16CCL M CC Link System Master Block ii ...
Page 6: ...FX2N 16CCL M CC Link System Master Block iv ...
Page 34: ...FX2N 16CCL M CC Link System Master Block System Configuration 3 3 14 MEMO ...
Page 66: ...FX2N 16CCL M CC Link System Master Block Specification 4 4 32 MEMO ...
Page 144: ...FX2N 16CCL M CC Link System Master Block Programming 9 9 16 MEMO ...
Page 172: ...FX2N 16CCL M CC Link System Master Block Communication in Compound System 12 12 10 MEMO ...
Page 192: ...FX2N 16CCL M CC Link System Master Block Appendix 14 14 4 MEMO ...
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