FX2N-16CCL-M CC-Link System Master Block
Specification 4
4-13
Table 4.9:
PLC
→
Master block
Write (when TO instruction is used)
BFM
number
Write
bit
Output signal name
Reference: Output number
in A/QnA/Q Series
BFM
#A
H
(#10)
b0
Refresh command
Yn0
b1
(Prohibited to use)
Yn1
b2
Yn2
b3
Yn3
b4
Request for module reset
Yn4
b5
(Prohibited to use)
Yn5
b6
Request for data link startup by buffer memory
parameters
Yn6
b7
(Prohibited to use)
Yn7
b8
Request for data link startup by EEPROM
parameters
Yn8
b9
(Prohibited to use)
Yn9
b10
Request for parameter registration to EEPROM
YnA
b11
(Prohibited to use)
YnB
b12
YnC
b13
YnD
b14
YnE
b15
YnF
Summary of Contents for FX2N-16CCL-M
Page 4: ...FX2N 16CCL M CC Link System Master Block ii ...
Page 6: ...FX2N 16CCL M CC Link System Master Block iv ...
Page 34: ...FX2N 16CCL M CC Link System Master Block System Configuration 3 3 14 MEMO ...
Page 66: ...FX2N 16CCL M CC Link System Master Block Specification 4 4 32 MEMO ...
Page 144: ...FX2N 16CCL M CC Link System Master Block Programming 9 9 16 MEMO ...
Page 172: ...FX2N 16CCL M CC Link System Master Block Communication in Compound System 12 12 10 MEMO ...
Page 192: ...FX2N 16CCL M CC Link System Master Block Appendix 14 14 4 MEMO ...
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