FX2N-16CCL-M CC-Link System Master Block
Data Link Procedure 8
8-17
8.8
Parameter Check (Parameter Verification Test)
The contents of the parameters can be verified.
Execute the test using the following procedure.
Set the mode setting switch in the master block to 5.
The test can be executed even when cables are
connected to the master block.
Continued to the next page
The LED indicators light as shown below until the
setting of the mode setting switch is changed.
SW
M/S
PRM
TIME
Repeats.
Start
Turn off the power of the PLC and the master block,
then turn it on again.
OFF
↓
ON
When the parameters are registered in the
EEPROM, set to ON the output of request for
data link startup by EEPROM parameters
(BFM#A
H
b8).
Register the parameters to the buffer memory,
then set to ON the output of request for data link
startup by buffer memory parameters
(BFM#A
H
b6).
or
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Summary of Contents for FX2N-16CCL-M
Page 4: ...FX2N 16CCL M CC Link System Master Block ii ...
Page 6: ...FX2N 16CCL M CC Link System Master Block iv ...
Page 34: ...FX2N 16CCL M CC Link System Master Block System Configuration 3 3 14 MEMO ...
Page 66: ...FX2N 16CCL M CC Link System Master Block Specification 4 4 32 MEMO ...
Page 144: ...FX2N 16CCL M CC Link System Master Block Programming 9 9 16 MEMO ...
Page 172: ...FX2N 16CCL M CC Link System Master Block Communication in Compound System 12 12 10 MEMO ...
Page 192: ...FX2N 16CCL M CC Link System Master Block Appendix 14 14 4 MEMO ...
Page 193: ......