Intel® Server Board S2600CW Functional Architecture
Intel® Server Board S2600CW Family TPS
36
Revision 2.4
CPU 0
S2600CW2R
S2600CWTR
S2600CW2SR
S2600CWTSR
PCI Ports
Bus (B)
Device
(D)
Function
(F)
On-board Device
On-board Device
PE1A
0
1
0
I350/X540
I350/X540
PE1B
0
1
1
I350/X540
I350/X540
PE2A
0
2
0
PCIE Slot6
PCIE Slot6
PE2B
0
2
1
PCIE Slot6
PCIE Slot6
PE2C
0
2
2
PCIE Slot6
PCIE Slot6
PE2D
0
2
3
PCIE Slot6
PCIE Slot6
PE3A
0
3
0
PCIE Slot5
PCIE Slot5
PE3B
0
3
1
PCIE Slot5
PCIE Slot5
PE3C
0
3
2
PCIE Slot5
LSISAS3008
PE3D
0
3
3
PCIE Slot5
LSISAS3008
DMI
0
0
0
PCIE Slot5
PCH
CPU 1
S2600CW2R
S2600CWTR
S2600CW2SR
S2600CWTSR
PCI Ports
Bus (B)
Device
(D)
Function
(F)
On-board Device
On-board Device
PE1A
0x80
1
0
PCIE Slot3
PCIE Slot3
PE1B
0x80
1
1
PCIE Slot3
PCIE Slot3
PE2A
0x80
2
0
PCIE Slot2
PCIE Slot2
PE2B
0x80
2
1
PCIE Slot2
PCIE Slot2
PE2C
0x80
2
2
PCIE Slot2
PCIE Slot2
PE2D
0x80
2
3
PCIE Slot2
PCIE Slot2
PE3A
0x80
3
0
PCIE Slot4
PCIE Slot4
PE3B
0x80
3
1
PCIE Slot4
PCIE Slot4
PE3C
0x80
3
2
PCIE Slot4
PCIE Slot4
PE3D
0x80
3
3
PCIE Slot4
PCIE Slot4
DMI
N/A
N/A
N/A
Not connected
Not connected
3.4.3
PCIe Non-Transparent Bridge (NTB)
PCI Express Non-Transparent Bridge (NTB) acts as a gateway that enables high performance,
low overhead communication between two intelligent subsystems, the local and the remote
subsystems. The NTB allows a local processor to independently configure and control the
local subsystem, provides isolation of the local host memory domain from the remote host
memory domain while enabling status and data exchange between the two domains.
The PCI Express Port 3A of Intel® Xeon® Processor E5-2600 Product Families can be
configured to be a transparent bridge or an NTB with x4/x8/x16 link width and
Gen1/Gen2/Gen3 link speed. This NTB port could be attached to another NTB port or PCI