IBM PPC440X5 CPU Core, User Manual

Page: 550 / 590

User’s Manual
PPC440x5 CPU Core Preliminary
Page 550 of 589
instalfa.fm.
September 12, 2002
slwi
RA, RS, n
Shift left immediate. (n < 32)
(RA)0:31-n
←
(RS)n:31
(RA)32-n:31
←
n
0
Extended mnemonic for
rlwinm RA,RS,n,0,31
−
n
400
slwi.
Extended mnemonic for
rlwinm. RA,RS,n,0,31
−
n
CR[CR0]
sraw
RA, RS, RB
Shift right algebraic (RS) by (RB)27:31.
n
←
(RB)27:31.
r
←
ROTL((RS), 32 – n).
if (RB)26 = 0 then m
←
MASK(n, 31)
else m
←
32
0
s
←
(RS)0
(RA)
←
(r
∧
m)
∨
(
32
s
∧ ¬
m).
XER[CA]
←
s
∧
((r
∧ ¬
m)
≠
0).
406
sraw.
CR[CR0]
srawi
RA, RS, SH
Shift right algebraic (RS) by SH.
n
←
SH.
r
←
ROTL((RS), 32 – n).
m
←
MASK(n, 31).
s
←
(RS)0
(RA)
←
(r
∧
m)
∨
(
32
s
∧ ¬
m).
XER[CA]
←
s
∧
((r
∧ ¬
m)
≠
0).
407
srawi.
CR[CR0]
srw
RA, RS, RB
Shift right (RS) by (RB)27:31.
n
←
(RB)27:31.
r
←
ROTL((RS), 32 – n).
if (RB)26 = 0 then m
←
MASK(n, 31)
else m
←
32
0
(RA)
←
r
∧
m.
408
srw.
CR[CR0]
srwi
RA, RS, n
Shift right immediate. (n < 32)
(RA)n:31
←
(RS)0:31-n
(RA)0:n-1
←
n
0
Extended mnemonic for
rlwinm RA,RS,32
−
n,n,31
400
srwi.
Extended mnemonic for
rlwinm. RA,RS,32
−
n,n,31
CR[CR0]
stb
RS, D(RA)
Store byte (RS)24:31 in memory at
EA = (RA|0) + EXTS(D).
409
stbu
RS, D(RA)
Store byte (RS)24:31 in memory at
EA = (RA|0) + EXTS(D).
Update the base address,
(RA)
←
EA.
410
stbux
RS, RA, RB
Store byte (RS)24:31 in memory at
EA = (RA|0) + (RB).
Update the base address,
(RA)
←
EA.
411
stbx
RS, RA, RB
Store byte (RS)24:31 in memory at
EA = (RA|0) + (RB).
412
sth
RS, D(RA)
Store halfword (RS)16:31 in memory at
EA = (RA|0) + EXTS(D).
413
sthbrx
RS, RA, RB
Store halfword (RS)16:31 byte-reversed in memory at EA =
(RA|0) + (RB).
MS(EA, 2)
←
(RS)
24:31
||
(RS)
16:23
414
Table A-1. PPC440x5 Instruction Syntax Summary (continued)
Mnemonic Operands Function
Other Registers
Changed
Page