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ADSP-2126x SHARC Processor Hardware Reference
15-25
System Design
The 32-bit SPI host packs or prearranges the data as:
SPI word 1= 0x33445566
SPI word 2 = 0xCCDD1122
SPI word 3 = 0x7788AABB
16-bit SPI Host Boot
shows how a 16-bit SPI host packs 48-bit instructions at PM
addresses 0x80000 and 0x80001. For 16-bit hosts, two 16-bit words are
packed into the shift register to generate a 32-bit word. The 32-bit word
shifts to internal program memory during the kernel load.
The following example shows a 48-bit instructions executed.
[0x80000] 0x112233445566
[0x80001] 0x7788AABBCCDD
Figure 15-9. 32-Bit SPI Host Packing
RXSPI
DMA
INTERNAL
MEMORY
0x90000
0x900FF
MOSI
32
32
32
3
2
-B
IT
W
O
R
D
N
Summary of Contents for ADSP-21261 SHARC
Page 30: ...Contents xxx ADSP 2126x SHARC Processor Hardware Reference ...
Page 40: ...Register Diagram Conventions xl ADSP 2126x SHARC Processor Hardware Reference ...
Page 58: ...Differences From Previous SHARCs 1 18 ADSP 2126x SHARC Processor Hardware Reference ...
Page 112: ...Secondary Processing Element PEy 2 54 ADSP 2126x SHARC Processor Hardware Reference ...
Page 178: ...Summary 3 66 ADSP 2126x SHARC Processor Hardware Reference ...
Page 204: ...DAG Instruction Summary 4 26 ADSP 2126x SHARC Processor Hardware Reference ...
Page 322: ...Setting Up DMA 7 32 ADSP 2126x SHARC Processor Hardware Reference ...
Page 436: ...SPORT Programming Examples 9 86 ADSP 2126x SHARC Processor Hardware Reference ...
Page 521: ...ADSP 2126x SHARC Processor Hardware Reference 11 31 Input Data Port rts IDP_ISR end ...
Page 522: ...Input Data Port Programming Example 11 32 ADSP 2126x SHARC Processor Hardware Reference ...
Page 590: ...Timer Programming Examples 14 20 ADSP 2126x SHARC Processor Hardware Reference ...
Page 796: ...I O Processor Registers A 174 ADSP 2126x SHARC Processor Hardware Reference ...
Page 800: ...B 4 ADSP 2126x SHARC Processor Core Manual ...
Page 846: ...Index I 36 ADSP 2126x SHARC Processor Hardware Reference ...