7-8
ADSP-2126x SHARC Processor Hardware Reference
•
lists all the bits in
DAI_IRPTL_H
.
•
lists all the bits in
DAI_IRPTL_L
.
The DMA controller in the ADSP-2126x maintains the status informa-
tion of the channels in each of the peripherals registers,
SPMCTLxy
,
PPCTL
,
DAI_STAT
, and
SPIDMAC
. More information on these registers can be found
at the following locations.
• Bit definitions for the
SPIDMAC
register are illustrated in
Configuration (SPIDMAC) Register” on page A-103
.
• Bit definitions for the
SPMCTLxy
register are illustrated in
Multichannel Control Registers (SPMCTLxy)” on page A-79
.
• Bit definitions for the
PPCTL
register are illustrated in
Control Register (PPCTL)” on page A-108
• Bit definitions for the
DAI_STAT
register are illustrated in
There is a one cycle latency between a change in DMA channel sta-
tus and the status update in the corresponding register.
If chaining is enabled on a DMA channel, programs should not use
polling to determine channel status as it can provide inaccurate
information. In this case, the DMA appears inactive if it is sampled
while the next transfer control block (TCB) is loading.
DMA Controller Operation
There are two methods you can use to start DMA sequences: chaining and
non-chaining.
Non-chained DMA.
To start a new DMA sequence after the current one
is finished, a program must first clear the DMA enable bit, write new
Summary of Contents for ADSP-21261 SHARC
Page 30: ...Contents xxx ADSP 2126x SHARC Processor Hardware Reference ...
Page 40: ...Register Diagram Conventions xl ADSP 2126x SHARC Processor Hardware Reference ...
Page 58: ...Differences From Previous SHARCs 1 18 ADSP 2126x SHARC Processor Hardware Reference ...
Page 112: ...Secondary Processing Element PEy 2 54 ADSP 2126x SHARC Processor Hardware Reference ...
Page 178: ...Summary 3 66 ADSP 2126x SHARC Processor Hardware Reference ...
Page 204: ...DAG Instruction Summary 4 26 ADSP 2126x SHARC Processor Hardware Reference ...
Page 322: ...Setting Up DMA 7 32 ADSP 2126x SHARC Processor Hardware Reference ...
Page 436: ...SPORT Programming Examples 9 86 ADSP 2126x SHARC Processor Hardware Reference ...
Page 521: ...ADSP 2126x SHARC Processor Hardware Reference 11 31 Input Data Port rts IDP_ISR end ...
Page 522: ...Input Data Port Programming Example 11 32 ADSP 2126x SHARC Processor Hardware Reference ...
Page 590: ...Timer Programming Examples 14 20 ADSP 2126x SHARC Processor Hardware Reference ...
Page 796: ...I O Processor Registers A 174 ADSP 2126x SHARC Processor Hardware Reference ...
Page 800: ...B 4 ADSP 2126x SHARC Processor Core Manual ...
Page 846: ...Index I 36 ADSP 2126x SHARC Processor Hardware Reference ...