585
Incorrect
Memory
Controller
Operation
Due
to
a
WrDatGrossDly
Setting
of
3.5
MEMCLKs
Description
The
memory
controller
may
incorrectly
issue
a
ZQ
command
during
a
64
-byte
write
operation
when
WrDatGrossDly
is
set
to
a
value
of
3.5
MEMCLKs
(111
b
).
Potential
Effect
on
System
Undefined
system
behavior
.
Suggested
Workaround
If
WrDatGrossDly
(
D
18
F
2
x
9
C
_
x
0000_0[3:0]0[3:1]_
dct
[1:0])
for
all
byte
lanes
(
including
the
ECC
byte
lane
)
and
all
populated
DIMMs
= 111
b
,
BIOS
should
set
DataTxFifoWrDly
(
D
18
F
2
x
210_
dct
[1:0]_
nbp
[3:0]
bits
18:16)
as
specified
in
the
BIOS
and
Kernel
Developer's
Guide
(
BKDG
)
for
AMD
Family
15
h
Models
00
h-
0
Fh
Processors
,
order
# 42301,
but
with
a
minimum
value
of
010
b
.
Fix
Planned
No
fix
planned
48063
Rev
. 3.18
October
2012
Revision
Guide
for
AMD
Family
15
h
Models
00
h-
0
Fh
Processors
Product
Errata
35