672
SVM
Guest
Performance
Counters
May
Be
Inaccurate
Due
to
SMI
Description
Performance
Event
Counters
[5:0] (
MSRC
001_020[
B
,9,7,5,3,1])
incorrectly
count
events
in
System-
Management
Mode
(
SMM
)
after
a
Secure
Virtual
Machine
(
SVM
)
guest
receives
a
System-Management
Interrupt
(
SMI
)
that
is
not
intercepted
by
the
host
.
This
occurs
when
guest
event
counting
is
enabled
by
setting
Performance
Event
Select
[5:0][
HostGuestOnly
] = 01
b
(
MSRC
001_020[
A
,8,6,4,2,0][41:40])
and
EFER
[
SVME
]
= 1
b
(
MSRC
000_0080[12]).
Potential
Effect
on
System
Performance
monitoring
software
overcounts
events
for
an
SVM
guest
when
non-intercepted
SMIs
occur
.
Suggested
Workaround
Contact
your
AMD
representative
for
information
on
a
BIOS
update
.
When
the
workaround
is
enabled
,
the
processor
swaps
the
HostGuestOnly
bits
(
i
.
e
.
bits
41
and
40
of
MSRC
001_020[
A
,8,6,4,2,0]
are
exchanged
)
before
entering
SMM
from
SVM
guest
mode
and
again
on
the
corresponding
RSM
.
Fix
Planned
Yes
Revision
Guide
for
AMD
Family
15
h
Models
00
h-
0
Fh
Processors
48063
Rev
. 3.18
October
2012
58
Product
Errata