538
Performance
Counter
Does
Not
Count
for
Some
Retired
Micro-Ops
Description
Some
instructions
with
F
0
h
in
the
opcode
byte
are
incorrectly
detected
by
the
processor
core
as
empty
micro-
ops
,
causing
the
processor
core
to
not
properly
increment
PMCx
0
C
1.
The
following
instructions
may
cause
this
performance
monitor
to
undercount
:
•
FCOMI
•
FCOMIP
•
F
2
XM
1
Potential
Effect
on
System
Performance
monitoring
software
will
not
have
an
accurate
count
of
retired
micro-ops
.
The
performance
counter
may
undercount
and
the
error
is
directly
proportional
to
the
number
of
the
instructions
listed
above
.
Suggested
Workaround
None
.
Fix
Planned
Yes
Revision
Guide
for
AMD
Family
15
h
Models
00
h-
0
Fh
Processors
48063
Rev
. 3.18
October
2012
32
Product
Errata