Table
7.
Cross-Reference
of
Processor
Revision
to
Errata
(
continued
)
No
.
Errata
Description
CPUID
Fn
0000_0001_
EAX
,
D
18
F
4
x
164[1:0]
00600
F
12
h
01
b
(
OR-B
2)
00600
F
20
h
11
b
(
OR-C
0)
608
P-state
Limit
Changes
May
Not
Generate
Interrupts
No
fix
planned
619
Non-Posted
Reads
May
Block
Write
Dependent
on
Probe
Responses
X
623
Small
Code
Segment
Limits
May
Cause
Incorrect
Limit
Faults
X
624
SB-RMI
Processor
State
Accesses
May
Persistently
Timeout
if
Interrupted
by
a
Warm
Reset
X
625
SB-RMI
Writes
May
Not
Be
Observed
by
Processor
No
fix
planned
636
Instruction
Addresses
Near
Canonical
Address
Limit
May
Cause
#
GP
Exception
X
637
Processor
Does
Not
Report
the
Correct
DRAM
Address
for
MCA
Errors
Within
the
CC
6
Save
Area
No
fix
planned
657
MC
1_
STATUS
Enable
Bit
Not
Set
When
Logging
Corrected
Errors
No
fix
planned
658
CPUID
Incorrectly
Reports
Large
Page
Support
in
L
2
Instruction
TLB
X
659
VMCB
Interrupt
Shadow
Status
May
Be
Incorrect
X
660
APERF
May
Increase
Unpredictably
X
661
P-State
Limit
and
Stop
Clock
Assertion
May
Cause
System
Hang
No
fix
planned
663
Local
Interrupts
LINT
0/
LINT
1
May
Occur
While
APIC
is
Software
Disabled
No
fix
planned
667
Processor
May
Generate
Incorrect
P-state
Limit
Interrupts
No
fix
planned
668
Load
Operation
May
Receive
Incorrect
Data
After
Floating-point
Exception
X
671
Debug
Breakpoint
on
Misaligned
Store
May
Cause
System
Hang
X
672
SVM
Guest
Performance
Counters
May
Be
Inaccurate
Due
to
SMI
X
673
Misaligned
Page
Crossing
String
Operations
May
Cause
System
Hang
X
674
Processor
May
Cache
Prefetched
Data
from
Remapped
Memory
Region
X
675
Instructions
Performing
Read-Modify-Write
May
Alter
Architectural
State
Before
#
PF
X
685
Some
Processor
Cores
May
Have
Inaccurate
Instruction
Cache
Fetch
Performance
Counter
X
689
AM
3
r
2
Six
Core
Processor
May
Limit
P-State
When
Core
C
6
State
Is
Disabled
X
690
Northbridge
FIFO
Read
/
Write
Pointer
Overlap
May
Cause
Hang
or
Protocol
Error
Machine
Check
No
fix
planned
48063
Rev
. 3.18
October
2012
Revision
Guide
for
AMD
Family
15
h
Models
00
h-
0
Fh
Processors
Product
Errata
15