Renesas H8SX/1650, Руководство по оборудованию

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Section 8 I/O Ports
Rev.2.00 Jun. 28, 2007 Page 258 of 666
REJ09B0311-0200
8.1.1 Data Direction Register (PnDDR) (n = 1 to 3, 6, A, B, D to F, H, and I)
DDR is an 8-bit write-only register that specifies the port input or output for each bit. A read from
the DDR is invalid and DDR is always read as an undefined value.
When the general I/O port function is selected, the corresponding pin functions as an output port
by setting the corresponding DDR bit to 1; the corresponding pin functions as an input port by
clearing the corresponding DDR bit to 0.
The initial DDR values are shown in table 8.3.
Bit
Bit Name
Initial Value
R/W
Note: The lower six bits are valid and the upper two bits are reserved for port 6 registers.
The lower four bits are valid and the upper four bits are reserved for port B registers.
7
Pn7DDR
0
W
6
Pn6DDR
0
W
5
Pn5DDR
0
W
4
Pn4DDR
0
W
3
Pn3DDR
0
W
2
Pn2DDR
0
W
1
Pn1DDR
0
W
0
Pn0DDR
0
W
Table 8.3 Startup Mode and Initial Value
Startup Mode
Port External Extended Mode
Port A H'80
Other ports H'00