Renesas H8SX/1650, Руководство по оборудованию

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Section 6 Bus Controller (BSC)
Rev.2.00 Jun. 28, 2007 Page 211 of 666
REJ09B0311-0200
6.13 Write Data Buffer Function
6.13.1 Write Data Buffer Function for External Data Bus
This LSI has a write data buffer function for the external data bus. Using the write data buffer
function enables external writes and internal accesses in parallel. The write data buffer function is
made available by setting the WDBE bit to 1 in BCR1.
Figure 6.40 shows an example of the timing when the write data buffer function is used. When this
function is used, if an external address space write continues for two cycles or longer, and there is
an internal access next, an external write only is executed in the first two cycles. However, from
the next cycle onward, internal accesses (on-chip memory or internal I/O register read/write) and
the external address space write rather than waiting until it ends are executed in parallel.
Peripheral module address
External write cycle
On-chip
memory 2
On-chip
memory 1
External address
Internal
address bus
B
φ
A23 to A0
CSn
LHWR
,
LLWR
D15 to D0
External
space
write
T1
T2
T3
On-chip memory read
Peripheral module read
I
φ
Figure 6.40 Example of Timing when Write Data Buffer Function is Used