Rev.2.00 Jun. 28, 2007 Page vii of xxii
3. Description of Registers
Each register description includes a bit chart, illustrating the arrangement of bits, and a table of
bits, describing the meanings of the bit settings. The standard format and notation for bit charts
and tables are described below.
Indicates the bit number or numbers.
In the case of a 32-bit register, the bits are arranged in order from 31 to 0. In the case
of a 16-bit register, the bits are arranged in order from 15 to 0.
Indicates the name of the bit or bit field.
When the number of bits has to be clearly indicated in the field, appropriate notation is
included (e.g., ASID[3:0]).
A reserved bit is indicated by "
−
".
Certain kinds of bits, such as those of timer counters, are not assigned bit names. In such
cases, the entry under Bit Name is blank.
(1) Bit
(2) Bit name
Indicates the value of each bit immediately after a power-on reset, i.e., the initial value.
0: The initial value is 0
1: The initial value is 1
−
: The initial value is undefined
(3) Initial value
For each bit and bit field, this entry indicates whether the bit or field is readable or writable,
or both writing to and reading from the bit or field are impossible.
The notation is as follows:
R/W:
R/(W):
R:
W:
The bit or field is readable and writable.
The bit or field is readable and writable.
However, writing is only performed to flag clearing.
The bit or field is readable.
"R" is indicated for all reserved bits. When writing to the register, write
the value under Initial Value in the bit chart to reserved bits or fields.
The bit or field is writable.
Note:
The bit names and sentences in the above figure are examples, and have nothing to do with the contents of this
manual.
(4) R/W
Describes the function of the bit or field and specifies the values for writing.
(5) Description
Bit
15
13 to 11
10
9
0
All 0
0
0
1
R
R/W
R
R
Address Identifier
These bits enable or disable the pin function.
Reserved
This bit is always read as 0.
Reserved
This bit is always read as 1.
−
ASID2 to
ASID0
−
−
−
Bit Name
Initial Value R/W
Description
[Bit Chart]
[Table of Bits]
14
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Bit:
Initial value:
R/W:
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
ASID2
ACMP2
Q
IFE
ASID1 ASID0
ACMP1 ACMP0
−
0
R
(1)
(2)
(3)
(4)
(5)
Reserved
These bits are always read as 0.
Содержание H8SX/1650
Страница 2: ...Rev 2 00 Jun 28 2007 Page ii of xxii...
Страница 106: ...Section 4 Exception Handling Rev 2 00 Jun 28 2007 Page 84 of 666 REJ09B0311 0200...
Страница 142: ...Section 5 Interrupt Controller Rev 2 00 Jun 28 2007 Page 120 of 666 REJ09B0311 0200...
Страница 326: ...Section 8 I O Ports Rev 2 00 Jun 28 2007 Page 304 of 666 REJ09B0311 0200...
Страница 470: ...Section 12 Watchdog Timer WDT Rev 2 00 Jun 28 2007 Page 448 of 666 REJ09B0311 0200...
Страница 546: ...Section 13 Serial Communication Interface SCI Rev 2 00 Jun 28 2007 Page 524 of 666 REJ09B0311 0200...
Страница 566: ...Section 14 A D Converter Rev 2 00 Jun 28 2007 Page 544 of 666 REJ09B0311 0200...
Страница 574: ...Section 16 RAM Rev 2 00 Jun 28 2007 Page 552 of 666 REJ09B0311 0200...
Страница 584: ...Section 17 Clock Pulse Generator Rev 2 00 Jun 28 2007 Page 562 of 666 REJ09B0311 0200...
Страница 638: ...Section 19 List of Registers Rev 2 00 Jun 28 2007 Page 616 of 666 REJ09B0311 0200...
Страница 668: ...Section 20 Electrical Characteristics Rev 2 00 Jun 28 2007 Page 646 of 666 REJ09B0311 0200...
Страница 676: ...Appendix Rev 2 00 Jun 28 2007 Page 654 of 666 REJ09B0311 0200...
Страница 688: ...Rev 2 00 Jun 28 2007 Page 666 of 666 REJ09B0311 0200...
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Страница 692: ...H8SX 1650 Group Hardware Manual...