Renesas H8SX/1650, Руководство по оборудованию

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Section 2 CPU
Rev.2.00 Jun. 28, 2007 Page 58 of 666
REJ09B0311-0200
Table 2.15 Effective Address Calculation for Branch Instructions
31 0
31 0
31 0
31 0
31
31 23 0
0
31
31 0
0
31
0
2 or 4
7
1
7
vec
op
disp
1
2
3
4
5
6
op
disp
op r
op
aa
op r
op
aa aa
aa
op aa aa
31
0
31
0
op vec
31 0 31 0
31 0
31 0
31 7 0
disp
31 0
31 0
31 15 0
disp
31 0
31
31 0
2
0
No.
Register indirect
Program-counter relative with 8-bit displacement
24-bit absolute address
32-bit absolute address
Zero
extension
Contents of general register (RL, R, or ER)
General register contents
Sign extension
Addressing Mode and Instruction Format Effective Address Calculation Effective Address (EA)
PC contents
Sign extension
PC contents
Zero extension
Zero extension
Memory contents
Memory contents
Zero extension
PC contents
Program-counter relative with 16-bit displacement
Program-counter relative with index register
Memory indirect
Extended memory indirect
+
×
+
×
+
2.8.13 MOVA Instruction
The MOVA Instruction stores the effective address into the general register.
1. Obtains data in the addressing mode of No.2 in table 2.14.
2. By using this data as the index instead of the general register in row No.5 in table 14.2, the
effective address calculation is executed, and the outcome is stored in the general register. For
details, see the H8SX Family Software Manual.