Renesas H8SX/1650, Руководство по оборудованию

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Section 3 MCU Operating Modes
Rev.2.00 Jun. 28, 2007 Page 65 of 666
REJ09B0311-0200
Bit Bit Name
Initial
Value R/W
Descriptions
10

0 R/W Reserved
This bit is always read as 0. The write value should
always
be 0.
9 EXPE
Undefined *
2
R/W External Bus Mode Enable
Selects external bus mode. In external extended mode,
this bit is fixed at 1 and cannot be changed. In single-
chip mode, the initial value of this bit is 0, and can be
read from or written to.
When writing 0 to this bit after reading EXPE = 1, an
external bus cycle should not be executed.
The external bus cycle may be carried out in parallel
with the internal bus cycle depending on the setting of
the write data buffer function.
0: External bus disabled
1: External bus enabled
8 RAME 1 R/W RAM Enable
Enables or disables the on-chip RAM. This bit is
initialized when the reset state is released. Do not write
0 during access to the on-chip RAM.
0: On-chip RAM disabled
1: On-chip RAM enabled
7 to 2

All 0 R/W Reserved
These bits are always read as 0. The write value should
always be 0.
1 DTCMD 1 R/W DTC Mode Select
Selects DTC operation mode.
0: DTC is in full-address mode
1: DTC is in short address mode
0

1 R/W Reserved
This bit is always read as 1. The write value should
always
be 1.
Notes: 1. For details, see section 2.3, Instruction Fetch.
2. The initial value depends on the startup mode.
In operating modes 4 and 5, which are external extended modes, EXPE = 1.