Renesas H8SX/1650, Руководство по оборудованию

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Section 13 Serial Communication Interface (SCI)
Rev.2.00 Jun. 28, 2007 Page 458 of 666
REJ09B0311-0200
Bit Bit Name
Initial
Value R/W Description
1
0
CKS1
CKS0
0
0
R/W
R/W
Clock Select 1,0
These bits select the clock source for the baud rate
generator.
00: P
φ
clock (n = 0)
01: P
φ
/4 clock (n = 1)
10: P
φ
/16 clock (n = 2)
11: P
φ
/64 clock (n = 3)
For the relation between the settings of these bits and
the baud rate, see section 13.3.9, Bit Rate Register
(BRR). n is the decimal display of the value of n in BRR
(see section 13.3.9, Bit Rate Register (BRR)).
Note: etu (Elementary Time Unit): 1-bit transfer time
13.3.6 Serial Control Register (SCR)
SCR is a register that enables/disables the following SCI transfer operations and interrupt requests,
and selects the transfer clock source. For details on interrupt requests, see section 13.8, Interrupt
Sources. Some bits in SCR have different functions in normal mode and smart card interface
mode.
•
When SMIF in SCMR = 0
7
TIE
0
R/W
6
RIE
0
R/W
5
TE
0
R/W
4
RE
0
R/W
3
MPIE
0
R/W
2
TEIE
0
R/W
1
CKE1
0
R/W
0
CKE0
0
R/W
Bit
Bit Name
Initial Value
R/W
•
When SMIF in SCMR = 1
7
TIE
0
R/W
6
RIE
0
R/W
5
TE
0
R/W
4
RE
0
R/W
3
MPIE
0
R/W
2
TEIE
0
R/W
1
CKE1
0
R/W
0
CKE0
0
R/W
Bit
Bit Name
Initial Value
R/W