Please refer to the Understanding and Optimizing Memory Performance for Intel Xeon Processor E5-2600
Series in IBM Flex System, System x, and BladeCenter Platforms white paper for the detail.
Memory mirrored channel
Memory mirrored channel mode replicates and stores data on two pairs of DIMMs within two channels
simultaneously.
If a failure occurs, the memory controller switches from the primary pair of memory DIMMs to the backup
pair of DIMMs. To enable memory mirrored channel through the Setup utility, select
System Settings
➙
Memory
. For more information, see “Using the Setup utility” on page 145. When you use the memory
mirrored channel feature, consider the following information:
• When you use memory mirrored channel, you must install a pair of DIMMs at a time. The two DIMMs in
each pair must be identical in size, type, and rank (single, dual, or quad), and organization, but not in
speed. The channels run at the speed of the slowest DIMM in any of the channels.
• The maximum available memory is reduced to half of the installed memory when memory mirrored
channel is enabled. For example, if you install 64 GB of memory using RDIMMs, only 32 GB of
addressable memory is available when you use memory mirrored channel.
• For UDIMMs, DIMM connectors 3, 6, 7, and 10 for microprocessor 1 and DIMM connectors 15, 18, 19,
and 22 for microprocessor 2 are not used in memory mirrored channel mode.
The following diagram lists the DIMM connectors on each memory channel.
Figure 186. Connectors on each memory channel
The following table shows the installation sequence for memory mirrored channel mode:
Table 35. Memory mirrored channel mode DIMM population sequence
Number of DIMMs
Number of installed
microprocessor
DIMM connector
First pair of DIMMs
1
1, 4
Second pair of DIMMs
1
9, 12
Third pair of DIMMs
1
2, 5
Fourth pair of DIMMs
1
8, 11
Fifth pair of DIMMs
1
3, 6
Sixth pair of DIMMs
1
7, 10
Seventh pair of DIMMs
2
13, 16
Eighth pair of DIMMs
2
21, 24
Ninth pair of DIMMs
2
14, 17
Tenth pair of DIMMs
2
20, 23
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