Fuji Electric micrex-sx NP1F-MP1, Руководство пользователя

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5-95
5-3 I/O Area of NP1F-MP2
(5) Ch2 bit command signal (Write signal, address No. 19, upper word)
. o N s s e r d d A 5 1 4 1 3 1 2 1 1 1 0 1 9 8 7 6 5 4 3 2 1 0
9 1 t c e l e s r e t s i g e r d a e R t c e l e s r e t s i g e r e t i r W
1) Write register select
Bit No. 4
0 to 4 Target frequency register 0 0 0 0 0
3 2 1 0
Description
Base frequency register 0 0 0 0 1
Current frequency register 0 0 0 1 0
Command pulse register 0 0 0 1 1
Deceleration point register 0 0 1 0 0
Acceleration/deceleration register 1 0 0 1 0 1
Acceleration/deceleration register 2 0 0 1 1 0
Speed multiplication register 0 0 1 1 1
(Not used) 0 1 0 0 0
Target frequency FIFO buffer 0 1 0 0 1
Command pulse count FIFO buffer 0 1 0 1 0
0 1 0 1 1
(Not used) 0 1 1 0 0
0 1 1 0 1
Error monitoring timer register 0 1 1 1 0
Control register 0 1 1 1 1
Backlash register 1 0 0 0 0
Near-zero monitor register 1 0 0 0 1
Deviation-over monitor register
High-speed limiter register
Delay time register
Feedback pulse multiplication register
1 0 0 1 0
1 0 0 1 1
1 0 1 0 0
1 0 1 0 1
1 0 1 1 0
1 0 1 1 1
Pulse count setting buffer, lower 1 1 0 0 0
Pulse count setting buffer, middle 1 1 0 0 1
Pulse count setting buffer, upper 1 1 0 1 0
Pulse count setting buffer, 16 1 1 0 1 1
(Not used) 1 1 1 0 0
1 1 1 0 1
1 1 1 1 0
1 1 1 1 1
5 Reserved
6 Sign for position data: 0 (forward); 1 (reverse)
7 Data write command for each register
Sign data
Data write command
(Not used)
Reserved
Precautions:
• Assign “0” (zero) for unused or reserved signals.
• Do not write data in the current frequency register.
If the current frequency register is rewritten, accelerating/decelerating processing is not executed normally.