W83627DHG
Publication Release Date: Aug, 22, 2007
-181- Version
1.4
CR 24h. (Global Option; Default 0100_0ss0b)
s: value by strapping
BIT READ
/
WRITE
DESCRIPTION
7
R / W
Select output type of CPUFANOUT1
=0 CPUFANOUT1 is Push-pull. (Default)
=1 CPUFANOUT1 is Open-drain.
6
R / W
CLKSEL => Input clock rate selection
= 0 The clock input on pin 18 is 24 MHz.
= 1 The clock input on pin 18 is 48 MHz. (Default)
5
R / W
Select output type of AUXFANOUT
=0 AUXFANOUT is Push-pull. (Default)
=1 AUXFANOUT is Open-drain.
4
R / W
Select output type of SYSFANOUT
=0 SYSFANOUT is Open-drain. (Default)
=1 SYSFANOUT is Push-pull.
3
R / W
Select output type of CPUFANOUT0
=0 CPUFANOUT0 is Open-drain. (Default)
=1 CPUFANOUT0 is Push-pull.
2 Read
Only
ENKBC => Enable keyboard controller
= 0 KBC is disabled after hardware reset.
= 1 KBC is enabled after hardware reset.
This bit is read-only, and it is set or reset by a power-on strapping pin (Pin
54, SOUTA).
1
R / W
ENROM => Enable Serial Peripheral Interface
= 0 ROM is disabled after hardware reset.
= 1 ROM is enabled after hardware reset.
This bit is set or reset by a power-on strapping pin (Pin 52, DTRA#).
Note 1
0 Reserved.
Note1:
Disable Serial Peripheral Interface
Enable Serial Peripheral Interface
Pin 2
Æ
GP23
Pin 2
Æ
SCK
Pin 19
Æ
GP22
Pin 19
Æ
SCE
Pin 58
Æ
AUXFANIN1
Pin 58
Æ
SI
Pin 118
Æ
BEEP Pin
118
Æ
SO
Summary of Contents for W83627DHG
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