Sun Microelectronics
146
UltraSPARC User’s Manual
8.3 Alternate Address Spaces
The SPARC-V9 Address Space Identifier (ASI) is evenly divided into restricted
and nonrestricted halves. ASIs in the range 00
16
..7F
16
are restricted; ASIs in the
range 80
16
.. FF
16
are non-restricted. An attempt by non-privileged software to ac-
cess a restricted ASI causes a
data_access_exception
trap.
ASIs in the ranges 04
16
.. 11
16
, 18
16
..19
16
, 24
16
..2C
16
, 70
16
.. 73
16
, 78
16
..79
16
and
80
16
.. FF
16
are called “normal” or “translating” ASIs. These ASIs are translated by
the MMU.
Bypass ASIs are in the range 14
16
..15
16
and 1C
16
.. 1D
16
. These ASIs are not trans-
lated by the MMU; instead, they pass through their virtual addresses as physical
addresses.
UltraSPARC Internal ASIs (also called “nontranslating ASIs”) are in the ranges
45
16
.. 6F
16
, 76
16
.. 77
16
and 7E
16
..7F
16
. These ASIs are not translated by the MMU;
instead, they pass through their virtual addresses as physical addresses. Accesses
made using these ASIs are always made in “big-endian” mode, regardless of the
setting of the D-MMU’s IE bit. Accesses to Internal ASIs with invalid virtual ad-
dress have undefined behavior; they may or may not cause a
data_access_exception
trap. They may or may not alias onto a valid virtual ad-
dress. Software should not rely on any specific behavior.
Note:
MEMBAR
#Sync
is generally needed after stores to internal ASIs. A
FLUSH, DONE, or RETRY is needed after stores to internal ASIs that affect
instruction accesses. See Section 5.3.8, “Instruction Prefetch to Side-Effect
Locations,” on page 38.
8.3.1 Supported SPARC-V9 ASIs
The SPARC-V9 architecture defines several address spaces that must be support-
ed by a conforming processor. They are listed in Table 8-1. All operand sizes are
supported in these accesses. See Appendix F, “ASI Names,” for an alphabetical
listing of ASI names and macro syntax.
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