Sun Microelectronics
300
UltraSPARC User’s Manual
a. Latency numbers enclosed in square brackets ([ ]) indicate cases where the hardware may prematurely dispatch a
dependent instruction from the G Stage, cancel it in the W Stage, and then refetch it. This effectively inserts nine
bubbles into the pipe.
Table 17-1
Latencies for Floating-Point and Graphics Instructions
Result used by
→
FPA or FPM
FGA
FGM
Result
generated
by:
↓
FADD{s,d}
FSUB{s,d}
F{s,d}TO{i,x}
F{i,x}TO{d,s}
F{s,d}TO{d,s}
FCMP{s,d}
FCMPE{s,d}
FMUL{s,d}
FsMULd
FDIV{s,d}
FSQRT{s,d}
FMOVr{s,d}
FMOVcc{s,d}
FMOV{s,d}
FABS{s,d}
FNEG{s,d}
FPADD{16,32}{s}
FPSUB{16,32}{s}
FALIGNDATA
FPMERGE
FEXPAND
FPACK{16,32,FIX}
FMUL8x16{AL,AU}
FMUL{d}8ULx16
FMUL{d}8SUx16
PDIST{rs1, rs2}
FCMPLE{16,32}
FCMPNE{16,32}
FCMPGT{16,32}
FCMPEQ{16,32}
PDIST {rd}
FPA or FPM
FADD{s,d}
FSUB{s,d}
F{s,d}TO{i,x}
F{i,x}TO{d,s}
F{s,d}TO{d,s}
FMUL{s,d}
FsMULd
3[4]
a
4
4
[2]
a
FDIVs, FSQRTs
12[13]
a
13
13
13
FDIVd, FSQRTd
22[23]
a
23
23
23
FGA
FMOV{s,d}
FABS{s,d}
FNEG{s,d}
1
1
1
[2]
a
FMOVr{s,d}
FMOVcc{s,d}
2
2
2
[2]
a
FPADD{16,32}{s}
FPSUB{16,32}{s}
FALIGNDATA
FPMERGE
FEXPAND
2
1
1[2]
a
[2]
a
FGM
FPACK{16,32,FIX}
4
3
1[4]
a
[2]
a
FMUL8x16{AL,AU}
FMUL{d}8ULx16
FMUL{d}8SUx16
PDIST
4
3
3[4]
a
1
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