IDT Configuration Registers
PES24T3G2 User Manual
8 - 8
February 22, 2012
Notes
0x054
DWord
Px_PCIESCAP
PCIESCAP - PCI Express Slot Capabilities (0x054) on page 8-28
0x058
Word
Px_PCIESCTL
PCIESCTL - PCI Express Slot Control (0x058) on page 8-30
0x05A
Word
Px_PCIESSTS
PCIESSTS - PCI Express Slot Status (0x05A) on page 8-31
0x064
DWord
Px_PCIEDCAP2
PCIEDCAP2 - PCI Express Device Capabilities 2 (0x064) on page 8-
32
0x068
Word
Px_PCIEDCTL2
PCIEDCTL2 - PCI Express Device Control 2 (0x068) on page 8-33
0x06A
Word
Px_PCIEDSTS2
PCIEDSTS2 - PCI Express Device Status 2 (0x06A) on page 8-33
0x06C
DWord
Px_PCIELCAP2
PCIELCAP2 - PCI Express Link Capabilities 2 (0x06C) on page 8-33
0x070
Word
Px_PCIELCTL2
PCIELCTL2 - PCI Express Link Control 2 (0x070) on page 8-33
0x072
Word
Px_PCIELSTS2
PCIELSTS2 - PCI Express Link Status 2 (0x072) on page 8-35
0x074
DWord
Px_PCIESCAP2
PCIESCAP2 - PCI Express Slot Capabilities 2 (0x074) on page 8-35
0x078
Word
Px_PCIESCTL2
PCIESCTL2 - PCI Express Slot Control 2 (0x078) on page 8-35
0x07A
Word
Px_PCIESSTS2
PCIESSTS2 - PCI Express Slot Status 2 (0x07A) on page 8-36
0x0C0
DWord
Px_PMCAP
PMCAP - PCI Power Management Capabilities (0x0C0) on page 8-36
0x0C4
DWord
Px_PMCSR
PMCSR - PCI Power Management Control and Status (0x0C4) on
page 8-37
0x0D0
DWord
Px_MSICAP
MSICAP - Message Signaled Interrupt Capability and Control
(0x0D0) on page 8-37
0x0D4
DWord
Px_MSIADDR
MSIADDR - Message Signaled Interrupt Address (0x0D4) on page 8-
38
0x0D8
DWord
Px_MSIUADDR
MSIUADDR - Message Signaled Interrupt Upper Address (0x0D8) on
page 8-38
0x0DC
DWord
Px_MSIMDATA
MSIMDATA - Message Signaled Interrupt Message Data (0x0DC) on
page 8-39
0x0F0
Dword
Px_SSIDSSVID
CAP
SSIDSSVIDCAP - Subsystem ID and Subsystem Vendor ID Capabil-
ity (0x0F0) on page 8-39
0x0F4
Dword
Px_SSIDSSVID
SSIDSSVID - Subsystem ID and Subsystem Vendor ID (0x0F4) on
page 8-39
0x0F8
Dword
Px_ECFGADDR
ECFGADDR - Extended Configuration Space Access Address
(0x0F8) on page 8-39
0x0FC
Dword
Px_ECFGDATA
ECFGDATA - Extended Configuration Space Access Data (0x0FC)
on page 8-40
0x100
Dword
Px_AERCAP
AERCAP - AER Capabilities (0x100) on page 8-40
0x104
Dword
Px_AERUES
AERUES - AER Uncorrectable Error Status (0x104) on page 8-40
0x108
Dword
Px_AERUEM
AERUEM - AER Uncorrectable Error Mask (0x108) on page 8-41
0x10C
Dword
Px_AERUESV
AERUESV - AER Uncorrectable Error Severity (0x10C) on page 8-44
0x110
Dword
Px_AERCES
AERCES - AER Correctable Error Status (0x110) on page 8-45
0x114
Dword
Px_AERCEM
AERCEM - AER Correctable Error Mask (0x114) on page 8-46
0x118
Dword
Px_AERCTL
AERCTL - AER Control (0x118) on page 8-47
Cfg.
Offset
Size
Register
Mnemonic
Register Definition
Table 8.3 Downstream Ports 2, 4, and 6 Configuration Space Registers (Part 3 of 5)
Summary of Contents for 89HPES24T3G2ZBAL
Page 8: ...IDT PES24T3G2 User Manual 6 February 22 2012 Notes...
Page 12: ...IDT Table of Contents PES24T3G2 User Manual iv February 22 2012 Notes...
Page 14: ...IDT List of Tables PES24T3G2 User Manual vi February 22 2012 Notes...
Page 16: ...IDT List of Figures PES24T3G2 User Manual viii February 22 2012 Notes...
Page 20: ...IDT Register List PES24T3G2 User Manual xii February 22 2012 Notes...
Page 32: ...IDT PES24T3G2 Device Overview PES24T3G2 User Manual 1 12 February 22 2012 Notes...
Page 72: ...IDT SMBus Interfaces PES24T3G2 User Manual 5 20 February 22 2012 Notes...
Page 76: ...IDT Power Management PES24T3G2 User Manual 6 4 February 22 2012 Notes...
Page 156: ...IDT Configuration Registers PES24T3G2 User Manual 8 74 February 22 2012 Notes...