Renesas 89HPES24T3G2ZBAL, User Manual

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IDT Hot-Plug and Hot-Swap
PES24T3G2 User Manual 7 - 5 February 22, 2012
Notes
Legacy System Hot-Plug Support
Some systems require support for operating systems that lack PCIe hot-plug support. The PES24T3G2
supports these systems by providing a General Purpose Event (GPEN) output as an alternate function of
GPIO[7] that can be used instead of the INTx, MSI, and PME mechanisms defined by PCI Express hot-
plug. Associated with each downstream port’s hot-plug controller is a bit in the General Purpose Event
Control (P0_GPECTL) register. When this bit is set, then the corresponding PCIe base 1.1 hot plug event
notification mechanisms are disabled for that port and INTx, MSI and PME events will not be generated by
that port due to hot-plug events. Instead, hot-plug events are signaled through assertion of the GPEN
signal. GPEN is an alternate function of GPIO[7] and GPIO[7] will not be asserted when GPEN is asserted
unless it is configured to operate as an alternate function.
Whenever a port signals a hot-plug event through assertion of the GPEN signal, the corresponding
port’s status bit in the General Purpose Event Status (P0_GPESTS) register is set. A bit in the P0_GPESTS
register can only be set if the corresponding port’s hot plug controller is configured to signal hot-plug events
using the general purpose event (GPEN) signal assertion mechanism. The hot-plug event signalling mech-
anism is the only thing that is affected when a port is configured to use general purpose events instead of
the PCIe defined hot-plug signalling mechanisms (i.e., INTx, MSI and PME). Thus, the PCIe defined capa-
bility, status and mask bits defined in the PCIe slot capabilities, status and control registers operate as
normal and all other hot-plug functionality associated with the port remains unchanged. INTx, MSI and PME
events from other sources are also unaffected.
The enhanced hot-plug signalling mechanism supported by the PES24T3G2 is graphically illustrated in
Figure 7.4. This figure provides a conceptual summary of the enhanced hot-plug signalling mechanism in
the form of a pseudo logic diagram. Logic gates in this diagram are intended for conveying general
concepts, and not for direct implementation.